1 /* 2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 3 * 4 * (C) Copyright 2009 Freescale Semiconductor, Inc. 5 * 6 * Configuration settings for the MX51EVK Board 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_H 12 #define __CONFIG_H 13 14 /* High Level Configuration Options */ 15 16 #define CONFIG_MX51 /* in a mx51 */ 17 18 #define CONFIG_DISPLAY_CPUINFO 19 #define CONFIG_DISPLAY_BOARDINFO 20 21 #define CONFIG_SYS_FSL_CLK 22 #define CONFIG_SYS_TEXT_BASE 0x97800000 23 24 #include <asm/arch/imx-regs.h> 25 26 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 27 #define CONFIG_SETUP_MEMORY_TAGS 28 #define CONFIG_INITRD_TAG 29 #define CONFIG_REVISION_TAG 30 31 #define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE 32 /* 33 * Size of malloc() pool 34 */ 35 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 36 37 #define CONFIG_BOARD_LATE_INIT 38 39 /* 40 * Hardware drivers 41 */ 42 #define CONFIG_FSL_IIM 43 #define CONFIG_CMD_FUSE 44 45 #define CONFIG_MXC_UART 46 #define CONFIG_MXC_UART_BASE UART1_BASE 47 #define CONFIG_MXC_GPIO 48 49 /* 50 * SPI Configs 51 * */ 52 53 #define CONFIG_MXC_SPI 54 55 /* PMIC Controller */ 56 #define CONFIG_POWER 57 #define CONFIG_POWER_SPI 58 #define CONFIG_POWER_FSL 59 #define CONFIG_FSL_PMIC_BUS 0 60 #define CONFIG_FSL_PMIC_CS 0 61 #define CONFIG_FSL_PMIC_CLK 2500000 62 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) 63 #define CONFIG_FSL_PMIC_BITLEN 32 64 #define CONFIG_RTC_MC13XXX 65 66 /* 67 * MMC Configs 68 * */ 69 #define CONFIG_FSL_ESDHC 70 #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR 71 #define CONFIG_SYS_FSL_ESDHC_NUM 2 72 73 #define CONFIG_MMC 74 75 #define CONFIG_GENERIC_MMC 76 #define CONFIG_DOS_PARTITION 77 78 /* 79 * Eth Configs 80 */ 81 #define CONFIG_MII 82 83 #define CONFIG_FEC_MXC 84 #define IMX_FEC_BASE FEC_BASE_ADDR 85 #define CONFIG_FEC_MXC_PHYADDR 0x1F 86 87 /* USB Configs */ 88 #define CONFIG_USB_EHCI 89 #define CONFIG_USB_EHCI_MX5 90 #define CONFIG_USB_HOST_ETHER 91 #define CONFIG_USB_ETHER_ASIX 92 #define CONFIG_USB_ETHER_SMSC95XX 93 #define CONFIG_MXC_USB_PORT 1 94 #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI 95 #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED 96 97 /* Framebuffer and LCD */ 98 #define CONFIG_PREBOOT 99 #define CONFIG_VIDEO 100 #define CONFIG_VIDEO_IPUV3 101 #define CONFIG_CFB_CONSOLE 102 #define CONFIG_VGA_AS_SINGLE_DEVICE 103 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 104 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 105 #define CONFIG_VIDEO_BMP_RLE8 106 #define CONFIG_SPLASH_SCREEN 107 #define CONFIG_BMP_16BPP 108 #define CONFIG_VIDEO_LOGO 109 #define CONFIG_IPUV3_CLK 133000000 110 111 /* allow to overwrite serial and ethaddr */ 112 #define CONFIG_ENV_OVERWRITE 113 #define CONFIG_CONS_INDEX 1 114 #define CONFIG_BAUDRATE 115200 115 116 /*********************************************************** 117 * Command definition 118 ***********************************************************/ 119 120 #define CONFIG_CMD_DATE 121 122 123 #define CONFIG_ETHPRIME "FEC0" 124 125 #define CONFIG_LOADADDR 0x92000000 /* loadaddr env var */ 126 127 #define CONFIG_EXTRA_ENV_SETTINGS \ 128 "script=boot.scr\0" \ 129 "image=zImage\0" \ 130 "fdt_file=imx51-babbage.dtb\0" \ 131 "fdt_addr=0x91000000\0" \ 132 "boot_fdt=try\0" \ 133 "ip_dyn=yes\0" \ 134 "mmcdev=0\0" \ 135 "mmcpart=1\0" \ 136 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ 137 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 138 "root=${mmcroot}\0" \ 139 "loadbootscript=" \ 140 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 141 "bootscript=echo Running bootscript from mmc ...; " \ 142 "source\0" \ 143 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 144 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 145 "mmcboot=echo Booting from mmc ...; " \ 146 "run mmcargs; " \ 147 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 148 "if run loadfdt; then " \ 149 "bootz ${loadaddr} - ${fdt_addr}; " \ 150 "else " \ 151 "if test ${boot_fdt} = try; then " \ 152 "bootz; " \ 153 "else " \ 154 "echo WARN: Cannot load the DT; " \ 155 "fi; " \ 156 "fi; " \ 157 "else " \ 158 "bootz; " \ 159 "fi;\0" \ 160 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 161 "root=/dev/nfs " \ 162 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 163 "netboot=echo Booting from net ...; " \ 164 "run netargs; " \ 165 "if test ${ip_dyn} = yes; then " \ 166 "setenv get_cmd dhcp; " \ 167 "else " \ 168 "setenv get_cmd tftp; " \ 169 "fi; " \ 170 "${get_cmd} ${image}; " \ 171 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 172 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 173 "bootz ${loadaddr} - ${fdt_addr}; " \ 174 "else " \ 175 "if test ${boot_fdt} = try; then " \ 176 "bootz; " \ 177 "else " \ 178 "echo ERROR: Cannot load the DT; " \ 179 "exit; " \ 180 "fi; " \ 181 "fi; " \ 182 "else " \ 183 "bootz; " \ 184 "fi;\0" 185 186 #define CONFIG_BOOTCOMMAND \ 187 "mmc dev ${mmcdev}; if mmc rescan; then " \ 188 "if run loadbootscript; then " \ 189 "run bootscript; " \ 190 "else " \ 191 "if run loadimage; then " \ 192 "run mmcboot; " \ 193 "else run netboot; " \ 194 "fi; " \ 195 "fi; " \ 196 "else run netboot; fi" 197 198 #define CONFIG_ARP_TIMEOUT 200UL 199 200 /* 201 * Miscellaneous configurable options 202 */ 203 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 204 #define CONFIG_AUTO_COMPLETE 205 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 206 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 207 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 208 209 #define CONFIG_SYS_MEMTEST_START 0x90000000 210 #define CONFIG_SYS_MEMTEST_END 0x90010000 211 212 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 213 214 #define CONFIG_CMDLINE_EDITING 215 216 /*----------------------------------------------------------------------- 217 * Physical Memory Map 218 */ 219 #define CONFIG_NR_DRAM_BANKS 1 220 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 221 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 222 223 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 224 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 225 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 226 227 #define CONFIG_BOARD_EARLY_INIT_F 228 229 #define CONFIG_SYS_INIT_SP_OFFSET \ 230 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 231 #define CONFIG_SYS_INIT_SP_ADDR \ 232 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 233 234 #define CONFIG_SYS_DDR_CLKSEL 0 235 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 236 #define CONFIG_SYS_MAIN_PWR_ON 237 238 /*----------------------------------------------------------------------- 239 * FLASH and environment organization 240 */ 241 #define CONFIG_SYS_NO_FLASH 242 243 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 244 #define CONFIG_ENV_SIZE (8 * 1024) 245 #define CONFIG_ENV_IS_IN_MMC 246 #define CONFIG_SYS_MMC_ENV_DEV 0 247 248 #endif 249