1 /* 2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 3 * 4 * (C) Copyright 2009 Freescale Semiconductor, Inc. 5 * 6 * Configuration settings for the MX51EVK Board 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24 #ifndef __CONFIG_H 25 #define __CONFIG_H 26 27 /* High Level Configuration Options */ 28 29 #define CONFIG_MX51 /* in a mx51 */ 30 31 #define CONFIG_DISPLAY_CPUINFO 32 #define CONFIG_DISPLAY_BOARDINFO 33 34 #define CONFIG_SYS_TEXT_BASE 0x97800000 35 36 #include <asm/arch/imx-regs.h> 37 /* 38 * Disabled for now due to build problems under Debian and a significant 39 * increase in the final file size: 144260 vs. 109536 Bytes. 40 */ 41 42 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 43 #define CONFIG_SETUP_MEMORY_TAGS 44 #define CONFIG_INITRD_TAG 45 #define CONFIG_REVISION_TAG 46 47 #define CONFIG_OF_LIBFDT 48 49 #define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE 50 /* 51 * Size of malloc() pool 52 */ 53 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 54 55 #define CONFIG_BOARD_LATE_INIT 56 57 /* 58 * Hardware drivers 59 */ 60 #define CONFIG_MXC_UART 61 #define CONFIG_MXC_UART_BASE UART1_BASE 62 #define CONFIG_MXC_GPIO 63 64 /* 65 * SPI Configs 66 * */ 67 #define CONFIG_CMD_SPI 68 69 #define CONFIG_MXC_SPI 70 71 /* PMIC Controller */ 72 #define CONFIG_POWER 73 #define CONFIG_POWER_SPI 74 #define CONFIG_POWER_FSL 75 #define CONFIG_FSL_PMIC_BUS 0 76 #define CONFIG_FSL_PMIC_CS 0 77 #define CONFIG_FSL_PMIC_CLK 2500000 78 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) 79 #define CONFIG_FSL_PMIC_BITLEN 32 80 #define CONFIG_RTC_MC13XXX 81 82 /* 83 * MMC Configs 84 * */ 85 #define CONFIG_FSL_ESDHC 86 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 87 #define CONFIG_SYS_FSL_ESDHC_NUM 2 88 89 #define CONFIG_MMC 90 91 #define CONFIG_CMD_MMC 92 #define CONFIG_GENERIC_MMC 93 #define CONFIG_CMD_FAT 94 #define CONFIG_DOS_PARTITION 95 96 /* 97 * Eth Configs 98 */ 99 #define CONFIG_MII 100 101 #define CONFIG_FEC_MXC 102 #define IMX_FEC_BASE FEC_BASE_ADDR 103 #define CONFIG_FEC_MXC_PHYADDR 0x1F 104 105 #define CONFIG_CMD_PING 106 #define CONFIG_CMD_DHCP 107 #define CONFIG_CMD_MII 108 #define CONFIG_CMD_NET 109 110 /* USB Configs */ 111 #define CONFIG_CMD_USB 112 #define CONFIG_CMD_FAT 113 #define CONFIG_USB_EHCI 114 #define CONFIG_USB_EHCI_MX5 115 #define CONFIG_USB_STORAGE 116 #define CONFIG_USB_HOST_ETHER 117 #define CONFIG_USB_ETHER_ASIX 118 #define CONFIG_USB_ETHER_SMSC95XX 119 #define CONFIG_MXC_USB_PORT 1 120 #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI 121 #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED 122 123 /* Framebuffer and LCD */ 124 #define CONFIG_PREBOOT 125 #define CONFIG_VIDEO 126 #define CONFIG_VIDEO_IPUV3 127 #define CONFIG_CFB_CONSOLE 128 #define CONFIG_VGA_AS_SINGLE_DEVICE 129 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 130 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 131 #define CONFIG_VIDEO_BMP_RLE8 132 #define CONFIG_SPLASH_SCREEN 133 #define CONFIG_BMP_16BPP 134 #define CONFIG_VIDEO_LOGO 135 #define CONFIG_IPUV3_CLK 133000000 136 137 /* allow to overwrite serial and ethaddr */ 138 #define CONFIG_ENV_OVERWRITE 139 #define CONFIG_CONS_INDEX 1 140 #define CONFIG_BAUDRATE 115200 141 142 /*********************************************************** 143 * Command definition 144 ***********************************************************/ 145 146 #include <config_cmd_default.h> 147 148 #undef CONFIG_CMD_IMLS 149 150 #define CONFIG_CMD_DATE 151 152 #define CONFIG_BOOTDELAY 3 153 154 #define CONFIG_ETHPRIME "FEC0" 155 156 #define CONFIG_LOADADDR 0x90800000 /* loadaddr env var */ 157 158 #define CONFIG_EXTRA_ENV_SETTINGS \ 159 "script=boot.scr\0" \ 160 "uimage=uImage\0" \ 161 "mmcdev=0\0" \ 162 "mmcpart=2\0" \ 163 "mmcroot=/dev/mmcblk0p3 rw\0" \ 164 "mmcrootfstype=ext3 rootwait\0" \ 165 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 166 "root=${mmcroot} " \ 167 "rootfstype=${mmcrootfstype}\0" \ 168 "loadbootscript=" \ 169 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 170 "bootscript=echo Running bootscript from mmc ...; " \ 171 "source\0" \ 172 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 173 "mmcboot=echo Booting from mmc ...; " \ 174 "run mmcargs; " \ 175 "bootm\0" \ 176 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 177 "root=/dev/nfs " \ 178 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 179 "netboot=echo Booting from net ...; " \ 180 "run netargs; " \ 181 "dhcp ${uimage}; bootm\0" \ 182 183 #define CONFIG_BOOTCOMMAND \ 184 "mmc dev ${mmcdev}; if mmc rescan; then " \ 185 "if run loadbootscript; then " \ 186 "run bootscript; " \ 187 "else " \ 188 "if run loaduimage; then " \ 189 "run mmcboot; " \ 190 "else run netboot; " \ 191 "fi; " \ 192 "fi; " \ 193 "else run netboot; fi" 194 195 #define CONFIG_ARP_TIMEOUT 200UL 196 197 /* 198 * Miscellaneous configurable options 199 */ 200 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 201 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 202 #define CONFIG_SYS_PROMPT "MX51EVK U-Boot > " 203 #define CONFIG_AUTO_COMPLETE 204 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 205 /* Print Buffer Size */ 206 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 207 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 208 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 209 210 #define CONFIG_SYS_MEMTEST_START 0x90000000 211 #define CONFIG_SYS_MEMTEST_END 0x90010000 212 213 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 214 215 #define CONFIG_SYS_HZ 1000 216 #define CONFIG_CMDLINE_EDITING 217 218 /*----------------------------------------------------------------------- 219 * Physical Memory Map 220 */ 221 #define CONFIG_NR_DRAM_BANKS 1 222 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 223 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 224 225 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 226 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 227 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 228 229 #define CONFIG_BOARD_EARLY_INIT_F 230 231 #define CONFIG_SYS_INIT_SP_OFFSET \ 232 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 233 #define CONFIG_SYS_INIT_SP_ADDR \ 234 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 235 236 #define CONFIG_SYS_DDR_CLKSEL 0 237 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 238 239 /*----------------------------------------------------------------------- 240 * FLASH and environment organization 241 */ 242 #define CONFIG_SYS_NO_FLASH 243 244 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 245 #define CONFIG_ENV_SIZE (8 * 1024) 246 #define CONFIG_ENV_IS_IN_MMC 247 #define CONFIG_SYS_MMC_ENV_DEV 0 248 249 #endif 250