1 /* 2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 3 * 4 * (C) Copyright 2009 Freescale Semiconductor, Inc. 5 * 6 * Configuration settings for the MX51EVK Board 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24 #ifndef __CONFIG_H 25 #define __CONFIG_H 26 27 /* High Level Configuration Options */ 28 29 #define CONFIG_MX51 /* in a mx51 */ 30 31 #define CONFIG_SYS_MX5_HCLK 24000000 32 #define CONFIG_SYS_MX5_CLK32 32768 33 #define CONFIG_DISPLAY_CPUINFO 34 #define CONFIG_DISPLAY_BOARDINFO 35 36 #define CONFIG_SYS_TEXT_BASE 0x97800000 37 38 #include <asm/arch/imx-regs.h> 39 /* 40 * Disabled for now due to build problems under Debian and a significant 41 * increase in the final file size: 144260 vs. 109536 Bytes. 42 */ 43 44 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 45 #define CONFIG_SETUP_MEMORY_TAGS 46 #define CONFIG_INITRD_TAG 47 48 #define CONFIG_OF_LIBFDT 49 50 #define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE 51 /* 52 * Size of malloc() pool 53 */ 54 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 55 56 #define CONFIG_BOARD_LATE_INIT 57 58 /* 59 * Hardware drivers 60 */ 61 #define CONFIG_MXC_UART 62 #define CONFIG_MXC_UART_BASE UART1_BASE 63 #define CONFIG_MXC_GPIO 64 65 /* 66 * SPI Configs 67 * */ 68 #define CONFIG_CMD_SPI 69 70 #define CONFIG_MXC_SPI 71 72 /* PMIC Controller */ 73 #define CONFIG_PMIC 74 #define CONFIG_PMIC_SPI 75 #define CONFIG_PMIC_FSL 76 #define CONFIG_FSL_PMIC_BUS 0 77 #define CONFIG_FSL_PMIC_CS 0 78 #define CONFIG_FSL_PMIC_CLK 2500000 79 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) 80 #define CONFIG_FSL_PMIC_BITLEN 32 81 #define CONFIG_RTC_MC13XXX 82 83 /* 84 * MMC Configs 85 * */ 86 #define CONFIG_FSL_ESDHC 87 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 88 #define CONFIG_SYS_FSL_ESDHC_NUM 2 89 90 #define CONFIG_MMC 91 92 #define CONFIG_CMD_MMC 93 #define CONFIG_GENERIC_MMC 94 #define CONFIG_CMD_FAT 95 #define CONFIG_DOS_PARTITION 96 97 /* 98 * Eth Configs 99 */ 100 #define CONFIG_HAS_ETH1 101 #define CONFIG_MII 102 103 #define CONFIG_FEC_MXC 104 #define IMX_FEC_BASE FEC_BASE_ADDR 105 #define CONFIG_FEC_MXC_PHYADDR 0x1F 106 107 #define CONFIG_CMD_PING 108 #define CONFIG_CMD_DHCP 109 #define CONFIG_CMD_MII 110 #define CONFIG_CMD_NET 111 112 /* USB Configs */ 113 #define CONFIG_CMD_USB 114 #define CONFIG_CMD_FAT 115 #define CONFIG_USB_EHCI 116 #define CONFIG_USB_EHCI_MX5 117 #define CONFIG_USB_STORAGE 118 #define CONFIG_USB_HOST_ETHER 119 #define CONFIG_USB_ETHER_ASIX 120 #define CONFIG_USB_ETHER_SMSC95XX 121 #define CONFIG_MXC_USB_PORT 1 122 #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI 123 #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED 124 125 /* Framebuffer and LCD */ 126 #define CONFIG_PREBOOT 127 #define CONFIG_VIDEO 128 #define CONFIG_VIDEO_IPUV3 129 #define CONFIG_CFB_CONSOLE 130 #define CONFIG_VGA_AS_SINGLE_DEVICE 131 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 132 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 133 #define CONFIG_VIDEO_BMP_RLE8 134 #define CONFIG_SPLASH_SCREEN 135 #define CONFIG_BMP_16BPP 136 #define CONFIG_VIDEO_LOGO 137 #define CONFIG_IPUV3_CLK 133000000 138 139 /* allow to overwrite serial and ethaddr */ 140 #define CONFIG_ENV_OVERWRITE 141 #define CONFIG_CONS_INDEX 1 142 #define CONFIG_BAUDRATE 115200 143 144 /*********************************************************** 145 * Command definition 146 ***********************************************************/ 147 148 #include <config_cmd_default.h> 149 150 #undef CONFIG_CMD_IMLS 151 152 #define CONFIG_CMD_DATE 153 154 #define CONFIG_BOOTDELAY 3 155 156 #define CONFIG_ETHPRIME "FEC0" 157 158 #define CONFIG_LOADADDR 0x90800000 /* loadaddr env var */ 159 160 #define CONFIG_EXTRA_ENV_SETTINGS \ 161 "script=boot.scr\0" \ 162 "uimage=uImage\0" \ 163 "mmcdev=0\0" \ 164 "mmcpart=2\0" \ 165 "mmcroot=/dev/mmcblk0p3 rw\0" \ 166 "mmcrootfstype=ext3 rootwait\0" \ 167 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 168 "root=${mmcroot} " \ 169 "rootfstype=${mmcrootfstype}\0" \ 170 "loadbootscript=" \ 171 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 172 "bootscript=echo Running bootscript from mmc ...; " \ 173 "source\0" \ 174 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 175 "mmcboot=echo Booting from mmc ...; " \ 176 "run mmcargs; " \ 177 "bootm\0" \ 178 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 179 "root=/dev/nfs " \ 180 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 181 "netboot=echo Booting from net ...; " \ 182 "run netargs; " \ 183 "dhcp ${uimage}; bootm\0" \ 184 185 #define CONFIG_BOOTCOMMAND \ 186 "if mmc rescan ${mmcdev}; then " \ 187 "if run loadbootscript; then " \ 188 "run bootscript; " \ 189 "else " \ 190 "if run loaduimage; then " \ 191 "run mmcboot; " \ 192 "else run netboot; " \ 193 "fi; " \ 194 "fi; " \ 195 "else run netboot; fi" 196 197 #define CONFIG_ARP_TIMEOUT 200UL 198 199 /* 200 * Miscellaneous configurable options 201 */ 202 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 203 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 204 #define CONFIG_SYS_PROMPT "MX51EVK U-Boot > " 205 #define CONFIG_AUTO_COMPLETE 206 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 207 /* Print Buffer Size */ 208 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 209 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 210 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 211 212 #define CONFIG_SYS_MEMTEST_START 0x90000000 213 #define CONFIG_SYS_MEMTEST_END 0x90010000 214 215 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 216 217 #define CONFIG_SYS_HZ 1000 218 #define CONFIG_CMDLINE_EDITING 219 220 /*----------------------------------------------------------------------- 221 * Physical Memory Map 222 */ 223 #define CONFIG_NR_DRAM_BANKS 1 224 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 225 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 226 227 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 228 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 229 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 230 231 #define CONFIG_BOARD_EARLY_INIT_F 232 233 #define CONFIG_SYS_INIT_SP_OFFSET \ 234 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 235 #define CONFIG_SYS_INIT_SP_ADDR \ 236 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 237 238 #define CONFIG_SYS_DDR_CLKSEL 0 239 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 240 241 /*----------------------------------------------------------------------- 242 * FLASH and environment organization 243 */ 244 #define CONFIG_SYS_NO_FLASH 245 246 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 247 #define CONFIG_ENV_SIZE (8 * 1024) 248 #define CONFIG_ENV_IS_IN_MMC 249 #define CONFIG_SYS_MMC_ENV_DEV 0 250 251 #endif 252