1 /* 2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 3 * 4 * (C) Copyright 2009 Freescale Semiconductor, Inc. 5 * 6 * Configuration settings for the MX51EVK Board 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __CONFIG_H 12 #define __CONFIG_H 13 14 /* High Level Configuration Options */ 15 16 #define CONFIG_MX51 /* in a mx51 */ 17 18 #define CONFIG_SYS_FSL_CLK 19 #define CONFIG_SYS_TEXT_BASE 0x97800000 20 21 #include <asm/arch/imx-regs.h> 22 23 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 24 #define CONFIG_SETUP_MEMORY_TAGS 25 #define CONFIG_INITRD_TAG 26 #define CONFIG_REVISION_TAG 27 28 #define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE 29 /* 30 * Size of malloc() pool 31 */ 32 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 33 34 #define CONFIG_BOARD_LATE_INIT 35 36 /* 37 * Hardware drivers 38 */ 39 #define CONFIG_FSL_IIM 40 #define CONFIG_CMD_FUSE 41 42 #define CONFIG_MXC_UART 43 #define CONFIG_MXC_UART_BASE UART1_BASE 44 #define CONFIG_MXC_GPIO 45 46 /* 47 * SPI Configs 48 * */ 49 50 #define CONFIG_MXC_SPI 51 52 /* PMIC Controller */ 53 #define CONFIG_POWER 54 #define CONFIG_POWER_SPI 55 #define CONFIG_POWER_FSL 56 #define CONFIG_FSL_PMIC_BUS 0 57 #define CONFIG_FSL_PMIC_CS 0 58 #define CONFIG_FSL_PMIC_CLK 2500000 59 #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) 60 #define CONFIG_FSL_PMIC_BITLEN 32 61 #define CONFIG_RTC_MC13XXX 62 63 /* 64 * MMC Configs 65 * */ 66 #define CONFIG_FSL_ESDHC 67 #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR 68 #define CONFIG_SYS_FSL_ESDHC_NUM 2 69 70 #define CONFIG_GENERIC_MMC 71 #define CONFIG_DOS_PARTITION 72 73 /* 74 * Eth Configs 75 */ 76 #define CONFIG_MII 77 78 #define CONFIG_FEC_MXC 79 #define IMX_FEC_BASE FEC_BASE_ADDR 80 #define CONFIG_FEC_MXC_PHYADDR 0x1F 81 82 /* USB Configs */ 83 #define CONFIG_USB_EHCI 84 #define CONFIG_USB_EHCI_MX5 85 #define CONFIG_USB_HOST_ETHER 86 #define CONFIG_USB_ETHER_ASIX 87 #define CONFIG_USB_ETHER_SMSC95XX 88 #define CONFIG_MXC_USB_PORT 1 89 #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI 90 #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED 91 92 /* Framebuffer and LCD */ 93 #define CONFIG_PREBOOT 94 #define CONFIG_VIDEO_IPUV3 95 #define CONFIG_VIDEO_BMP_RLE8 96 #define CONFIG_SPLASH_SCREEN 97 #define CONFIG_BMP_16BPP 98 #define CONFIG_VIDEO_LOGO 99 #define CONFIG_IPUV3_CLK 133000000 100 101 /* allow to overwrite serial and ethaddr */ 102 #define CONFIG_ENV_OVERWRITE 103 #define CONFIG_CONS_INDEX 1 104 #define CONFIG_BAUDRATE 115200 105 106 /*********************************************************** 107 * Command definition 108 ***********************************************************/ 109 110 #define CONFIG_CMD_DATE 111 112 113 #define CONFIG_ETHPRIME "FEC0" 114 115 #define CONFIG_LOADADDR 0x92000000 /* loadaddr env var */ 116 117 #define CONFIG_EXTRA_ENV_SETTINGS \ 118 "script=boot.scr\0" \ 119 "image=zImage\0" \ 120 "fdt_file=imx51-babbage.dtb\0" \ 121 "fdt_addr=0x91000000\0" \ 122 "boot_fdt=try\0" \ 123 "ip_dyn=yes\0" \ 124 "mmcdev=0\0" \ 125 "mmcpart=1\0" \ 126 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ 127 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 128 "root=${mmcroot}\0" \ 129 "loadbootscript=" \ 130 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 131 "bootscript=echo Running bootscript from mmc ...; " \ 132 "source\0" \ 133 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 134 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 135 "mmcboot=echo Booting from mmc ...; " \ 136 "run mmcargs; " \ 137 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 138 "if run loadfdt; then " \ 139 "bootz ${loadaddr} - ${fdt_addr}; " \ 140 "else " \ 141 "if test ${boot_fdt} = try; then " \ 142 "bootz; " \ 143 "else " \ 144 "echo WARN: Cannot load the DT; " \ 145 "fi; " \ 146 "fi; " \ 147 "else " \ 148 "bootz; " \ 149 "fi;\0" \ 150 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 151 "root=/dev/nfs " \ 152 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 153 "netboot=echo Booting from net ...; " \ 154 "run netargs; " \ 155 "if test ${ip_dyn} = yes; then " \ 156 "setenv get_cmd dhcp; " \ 157 "else " \ 158 "setenv get_cmd tftp; " \ 159 "fi; " \ 160 "${get_cmd} ${image}; " \ 161 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 162 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 163 "bootz ${loadaddr} - ${fdt_addr}; " \ 164 "else " \ 165 "if test ${boot_fdt} = try; then " \ 166 "bootz; " \ 167 "else " \ 168 "echo ERROR: Cannot load the DT; " \ 169 "exit; " \ 170 "fi; " \ 171 "fi; " \ 172 "else " \ 173 "bootz; " \ 174 "fi;\0" 175 176 #define CONFIG_BOOTCOMMAND \ 177 "mmc dev ${mmcdev}; if mmc rescan; then " \ 178 "if run loadbootscript; then " \ 179 "run bootscript; " \ 180 "else " \ 181 "if run loadimage; then " \ 182 "run mmcboot; " \ 183 "else run netboot; " \ 184 "fi; " \ 185 "fi; " \ 186 "else run netboot; fi" 187 188 #define CONFIG_ARP_TIMEOUT 200UL 189 190 /* 191 * Miscellaneous configurable options 192 */ 193 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 194 #define CONFIG_AUTO_COMPLETE 195 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 196 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 197 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 198 199 #define CONFIG_SYS_MEMTEST_START 0x90000000 200 #define CONFIG_SYS_MEMTEST_END 0x90010000 201 202 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 203 204 #define CONFIG_CMDLINE_EDITING 205 206 /*----------------------------------------------------------------------- 207 * Physical Memory Map 208 */ 209 #define CONFIG_NR_DRAM_BANKS 1 210 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 211 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 212 213 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 214 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 215 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 216 217 #define CONFIG_BOARD_EARLY_INIT_F 218 219 #define CONFIG_SYS_INIT_SP_OFFSET \ 220 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 221 #define CONFIG_SYS_INIT_SP_ADDR \ 222 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 223 224 #define CONFIG_SYS_DDR_CLKSEL 0 225 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 226 #define CONFIG_SYS_MAIN_PWR_ON 227 228 /*----------------------------------------------------------------------- 229 * FLASH and environment organization 230 */ 231 #define CONFIG_SYS_NO_FLASH 232 233 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 234 #define CONFIG_ENV_SIZE (8 * 1024) 235 #define CONFIG_ENV_IS_IN_MMC 236 #define CONFIG_SYS_MMC_ENV_DEV 0 237 238 #endif 239