1 /* 2 * (C) Copyright 2010, Stefano Babic <sbabic@denx.de> 3 * 4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. 5 * 6 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 7 * 8 * Configuration for the MX35pdk Freescale board. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_H 14 #define __CONFIG_H 15 16 #include <asm/arch/imx-regs.h> 17 18 /* High Level Configuration Options */ 19 #define CONFIG_ARM1136 /* This is an arm1136 CPU core */ 20 #define CONFIG_MX35 21 22 #define CONFIG_DISPLAY_CPUINFO 23 24 /* Set TEXT at the beginning of the NOR flash */ 25 #define CONFIG_SYS_TEXT_BASE 0xA0000000 26 27 #define CONFIG_BOARD_EARLY_INIT_F 28 #define CONFIG_BOARD_LATE_INIT 29 30 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 31 #define CONFIG_REVISION_TAG 32 #define CONFIG_SETUP_MEMORY_TAGS 33 #define CONFIG_INITRD_TAG 34 35 /* 36 * Size of malloc() pool 37 */ 38 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) 39 40 /* 41 * Hardware drivers 42 */ 43 #define CONFIG_HARD_I2C 44 #define CONFIG_I2C_MXC 45 #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR 46 #define CONFIG_SYS_I2C_SPEED 100000 47 #define CONFIG_MXC_SPI 48 #define CONFIG_MXC_GPIO 49 50 51 /* 52 * PMIC Configs 53 */ 54 #define CONFIG_POWER 55 #define CONFIG_POWER_I2C 56 #define CONFIG_POWER_FSL 57 #define CONFIG_PMIC_FSL_MC13892 58 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08 59 #define CONFIG_RTC_MC13XXX 60 61 /* 62 * MFD MC9SDZ60 63 */ 64 #define CONFIG_FSL_MC9SDZ60 65 #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69 66 67 /* 68 * UART (console) 69 */ 70 #define CONFIG_MXC_UART 71 #define CONFIG_MXC_UART_BASE UART1_BASE 72 73 /* allow to overwrite serial and ethaddr */ 74 #define CONFIG_ENV_OVERWRITE 75 #define CONFIG_CONS_INDEX 1 76 #define CONFIG_BAUDRATE 115200 77 78 /* 79 * Command definition 80 */ 81 82 #include <config_cmd_default.h> 83 84 #define CONFIG_OF_LIBFDT 85 #define CONFIG_CMD_BOOTZ 86 #define CONFIG_CMD_PING 87 #define CONFIG_CMD_DHCP 88 #define CONFIG_BOOTP_SUBNETMASK 89 #define CONFIG_BOOTP_GATEWAY 90 #define CONFIG_BOOTP_DNS 91 92 #define CONFIG_CMD_NAND 93 #define CONFIG_CMD_CACHE 94 95 #define CONFIG_CMD_I2C 96 #define CONFIG_CMD_SPI 97 #define CONFIG_CMD_MII 98 #define CONFIG_CMD_NET 99 #define CONFIG_NET_RETRY_COUNT 100 100 #define CONFIG_CMD_DATE 101 102 #define CONFIG_CMD_USB 103 #define CONFIG_USB_STORAGE 104 #define CONFIG_CMD_MMC 105 #define CONFIG_DOS_PARTITION 106 #define CONFIG_EFI_PARTITION 107 #define CONFIG_CMD_EXT2 108 #define CONFIG_CMD_FAT 109 110 #define CONFIG_BOOTDELAY 1 111 112 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ 113 114 /* 115 * Ethernet on the debug board (SMC911) 116 */ 117 #define CONFIG_SMC911X 118 #define CONFIG_SMC911X_16_BIT 1 119 #define CONFIG_SMC911X_BASE CS5_BASE_ADDR 120 121 #define CONFIG_HAS_ETH1 122 #define CONFIG_ETHPRIME 123 124 /* 125 * Ethernet on SOC (FEC) 126 */ 127 #define CONFIG_FEC_MXC 128 #define IMX_FEC_BASE FEC_BASE_ADDR 129 #define CONFIG_FEC_MXC_PHYADDR 0x1F 130 131 #define CONFIG_MII 132 133 #define CONFIG_ARP_TIMEOUT 200UL 134 135 /* 136 * Miscellaneous configurable options 137 */ 138 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 139 #define CONFIG_SYS_PROMPT "MX35 U-Boot > " 140 #define CONFIG_CMDLINE_EDITING 141 #define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */ 142 143 #define CONFIG_AUTO_COMPLETE 144 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 145 /* Print Buffer Size */ 146 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 147 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 148 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 149 150 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 151 #define CONFIG_SYS_MEMTEST_END 0x10000 152 153 #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ 154 155 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 156 157 #define CONFIG_SYS_HZ 1000 158 159 /* 160 * Physical Memory Map 161 */ 162 #define CONFIG_NR_DRAM_BANKS 2 163 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 164 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) 165 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 166 #define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024) 167 168 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR 169 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000) 170 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2) 171 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 172 GENERATED_GBL_DATA_SIZE) 173 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 174 CONFIG_SYS_GBL_DATA_OFFSET) 175 176 /* 177 * MTD Command for mtdparts 178 */ 179 #define CONFIG_CMD_MTDPARTS 180 #define CONFIG_MTD_DEVICE 181 #define CONFIG_FLASH_CFI_MTD 182 #define CONFIG_MTD_PARTITIONS 183 #define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0" 184 #define MTDPARTS_DEFAULT "mtdparts=mxc_nand:1m(boot),5m(linux)," \ 185 "96m(root),8m(cfg),1938m(user);" \ 186 "physmap-flash.0:512k(b),4m(k),30m(u),28m(r)" 187 188 /* 189 * FLASH and environment organization 190 */ 191 #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR 192 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 193 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ 194 /* Monitor at beginning of flash */ 195 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 196 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 197 198 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 199 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 200 201 /* Address and size of Redundant Environment Sector */ 202 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 203 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 204 205 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ 206 CONFIG_SYS_MONITOR_LEN) 207 208 #define CONFIG_ENV_IS_IN_FLASH 209 210 #if defined(CONFIG_FSL_ENV_IN_NAND) 211 #define CONFIG_ENV_IS_IN_NAND 212 #define CONFIG_ENV_OFFSET (1024 * 1024) 213 #endif 214 215 /* 216 * CFI FLASH driver setup 217 */ 218 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 219 #define CONFIG_FLASH_CFI_DRIVER 220 221 /* A non-standard buffered write algorithm */ 222 #define CONFIG_FLASH_SPANSION_S29WS_N 223 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ 224 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ 225 226 /* 227 * NAND FLASH driver setup 228 */ 229 #define CONFIG_NAND_MXC 230 #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR) 231 #define CONFIG_SYS_MAX_NAND_DEVICE 1 232 #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR) 233 #define CONFIG_MXC_NAND_HWECC 234 #define CONFIG_SYS_NAND_LARGEPAGE 235 236 /* EHCI driver */ 237 #define CONFIG_USB_EHCI 238 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 239 #define CONFIG_EHCI_IS_TDI 240 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 241 #define CONFIG_USB_EHCI_MXC 242 #define CONFIG_MXC_USB_PORT 0 243 #define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERFACE_DIFF_UNI | \ 244 MXC_EHCI_POWER_PINS_ENABLED | \ 245 MXC_EHCI_OC_PIN_ACTIVE_LOW) 246 #define CONFIG_MXC_USB_PORTSC (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI) 247 248 /* mmc driver */ 249 #define CONFIG_MMC 250 #define CONFIG_GENERIC_MMC 251 #define CONFIG_FSL_ESDHC 252 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 253 #define CONFIG_SYS_FSL_ESDHC_NUM 1 254 255 /* 256 * Default environment and default scripts 257 * to update uboot and load kernel 258 */ 259 260 #define CONFIG_HOSTNAME "mx35pdk" 261 #define CONFIG_EXTRA_ENV_SETTINGS \ 262 "netdev=eth1\0" \ 263 "ethprime=smc911x\0" \ 264 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 265 "nfsroot=${serverip}:${rootpath}\0" \ 266 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 267 "addip_sta=setenv bootargs ${bootargs} " \ 268 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 269 ":${hostname}:${netdev}:off panic=1\0" \ 270 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 271 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 272 "else run addip_sta;fi\0" \ 273 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 274 "addtty=setenv bootargs ${bootargs}" \ 275 " console=ttymxc0,${baudrate}\0" \ 276 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 277 "loadaddr=80800000\0" \ 278 "kernel_addr_r=80800000\0" \ 279 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 280 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 281 "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \ 282 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 283 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 284 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 285 "bootm ${kernel_addr}\0" \ 286 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 287 "run nfsargs addip addtty addmtd addmisc;" \ 288 "bootm ${kernel_addr_r}\0" \ 289 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \ 290 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \ 291 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \ 292 "load=tftp ${loadaddr} ${u-boot}\0" \ 293 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \ 294 "update=protect off ${uboot_addr} +80000;" \ 295 "erase ${uboot_addr} +80000;" \ 296 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \ 297 "upd=if run load;then echo Updating u-boot;if run update;" \ 298 "then echo U-Boot updated;" \ 299 "else echo Error updating u-boot !;" \ 300 "echo Board without bootloader !!;" \ 301 "fi;" \ 302 "else echo U-Boot not downloaded..exiting;fi\0" \ 303 "bootcmd=run net_nfs\0" 304 305 #endif /* __CONFIG_H */ 306