1 /* 2 * (C) Copyright 2010, Stefano Babic <sbabic@denx.de> 3 * 4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. 5 * 6 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 7 * 8 * Configuration for the MX35pdk Freescale board. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_H 14 #define __CONFIG_H 15 16 #include <asm/arch/imx-regs.h> 17 18 /* High Level Configuration Options */ 19 #define CONFIG_MX35 20 21 #define CONFIG_SYS_FSL_CLK 22 23 /* Set TEXT at the beginning of the NOR flash */ 24 #define CONFIG_SYS_TEXT_BASE 0xA0000000 25 26 #define CONFIG_BOARD_EARLY_INIT_F 27 #define CONFIG_BOARD_LATE_INIT 28 29 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 30 #define CONFIG_REVISION_TAG 31 #define CONFIG_SETUP_MEMORY_TAGS 32 #define CONFIG_INITRD_TAG 33 34 /* 35 * Size of malloc() pool 36 */ 37 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) 38 39 /* 40 * Hardware drivers 41 */ 42 #define CONFIG_SYS_I2C 43 #define CONFIG_SYS_I2C_MXC 44 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 45 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 46 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 47 #define CONFIG_MXC_SPI 48 #define CONFIG_MXC_GPIO 49 50 /* 51 * PMIC Configs 52 */ 53 #define CONFIG_POWER 54 #define CONFIG_POWER_I2C 55 #define CONFIG_POWER_FSL 56 #define CONFIG_POWER_FSL_MC13892 57 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08 58 #define CONFIG_RTC_MC13XXX 59 60 /* 61 * MFD MC9SDZ60 62 */ 63 #define CONFIG_FSL_MC9SDZ60 64 #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69 65 66 /* 67 * UART (console) 68 */ 69 #define CONFIG_MXC_UART 70 #define CONFIG_MXC_UART_BASE UART1_BASE 71 72 /* allow to overwrite serial and ethaddr */ 73 #define CONFIG_ENV_OVERWRITE 74 #define CONFIG_CONS_INDEX 1 75 #define CONFIG_BAUDRATE 115200 76 77 /* 78 * Command definition 79 */ 80 #define CONFIG_BOOTP_SUBNETMASK 81 #define CONFIG_BOOTP_GATEWAY 82 #define CONFIG_BOOTP_DNS 83 84 #define CONFIG_CMD_NAND 85 86 #define CONFIG_NET_RETRY_COUNT 100 87 #define CONFIG_CMD_DATE 88 89 #define CONFIG_DOS_PARTITION 90 #define CONFIG_EFI_PARTITION 91 92 93 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ 94 95 /* 96 * Ethernet on the debug board (SMC911) 97 */ 98 #define CONFIG_SMC911X 99 #define CONFIG_SMC911X_16_BIT 1 100 #define CONFIG_SMC911X_BASE CS5_BASE_ADDR 101 102 #define CONFIG_HAS_ETH1 103 #define CONFIG_ETHPRIME 104 105 /* 106 * Ethernet on SOC (FEC) 107 */ 108 #define CONFIG_FEC_MXC 109 #define IMX_FEC_BASE FEC_BASE_ADDR 110 #define CONFIG_FEC_MXC_PHYADDR 0x1F 111 112 #define CONFIG_MII 113 114 #define CONFIG_ARP_TIMEOUT 200UL 115 116 /* 117 * Miscellaneous configurable options 118 */ 119 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 120 #define CONFIG_CMDLINE_EDITING 121 122 #define CONFIG_AUTO_COMPLETE 123 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 124 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 125 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 126 127 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 128 #define CONFIG_SYS_MEMTEST_END 0x10000 129 130 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 131 132 /* 133 * Physical Memory Map 134 */ 135 #define CONFIG_NR_DRAM_BANKS 2 136 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 137 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) 138 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 139 #define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024) 140 141 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR 142 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000) 143 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2) 144 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 145 GENERATED_GBL_DATA_SIZE) 146 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 147 CONFIG_SYS_GBL_DATA_OFFSET) 148 149 /* 150 * MTD Command for mtdparts 151 */ 152 #define CONFIG_CMD_MTDPARTS 153 #define CONFIG_MTD_DEVICE 154 #define CONFIG_FLASH_CFI_MTD 155 #define CONFIG_MTD_PARTITIONS 156 #define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0" 157 #define MTDPARTS_DEFAULT "mtdparts=mxc_nand:1m(boot),5m(linux)," \ 158 "96m(root),8m(cfg),1938m(user);" \ 159 "physmap-flash.0:512k(b),4m(k),30m(u),28m(r)" 160 161 /* 162 * FLASH and environment organization 163 */ 164 #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR 165 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 166 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ 167 /* Monitor at beginning of flash */ 168 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 169 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 170 171 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 172 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 173 174 /* Address and size of Redundant Environment Sector */ 175 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 176 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 177 178 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ 179 CONFIG_SYS_MONITOR_LEN) 180 181 #define CONFIG_ENV_IS_IN_FLASH 182 183 #if defined(CONFIG_FSL_ENV_IN_NAND) 184 #define CONFIG_ENV_IS_IN_NAND 185 #define CONFIG_ENV_OFFSET (1024 * 1024) 186 #endif 187 188 /* 189 * CFI FLASH driver setup 190 */ 191 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 192 #define CONFIG_FLASH_CFI_DRIVER 193 194 /* A non-standard buffered write algorithm */ 195 #define CONFIG_FLASH_SPANSION_S29WS_N 196 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ 197 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ 198 199 /* 200 * NAND FLASH driver setup 201 */ 202 #define CONFIG_NAND_MXC 203 #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR) 204 #define CONFIG_SYS_MAX_NAND_DEVICE 1 205 #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR) 206 #define CONFIG_MXC_NAND_HWECC 207 #define CONFIG_SYS_NAND_LARGEPAGE 208 209 /* EHCI driver */ 210 #define CONFIG_USB_EHCI 211 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 212 #define CONFIG_EHCI_IS_TDI 213 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 214 #define CONFIG_USB_EHCI_MXC 215 #define CONFIG_MXC_USB_PORT 0 216 #define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERFACE_DIFF_UNI | \ 217 MXC_EHCI_POWER_PINS_ENABLED | \ 218 MXC_EHCI_OC_PIN_ACTIVE_LOW) 219 #define CONFIG_MXC_USB_PORTSC (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI) 220 221 /* mmc driver */ 222 #define CONFIG_GENERIC_MMC 223 #define CONFIG_FSL_ESDHC 224 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 225 #define CONFIG_SYS_FSL_ESDHC_NUM 1 226 227 /* 228 * Default environment and default scripts 229 * to update uboot and load kernel 230 */ 231 232 #define CONFIG_HOSTNAME "mx35pdk" 233 #define CONFIG_EXTRA_ENV_SETTINGS \ 234 "netdev=eth1\0" \ 235 "ethprime=smc911x\0" \ 236 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 237 "nfsroot=${serverip}:${rootpath}\0" \ 238 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 239 "addip_sta=setenv bootargs ${bootargs} " \ 240 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 241 ":${hostname}:${netdev}:off panic=1\0" \ 242 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 243 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 244 "else run addip_sta;fi\0" \ 245 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 246 "addtty=setenv bootargs ${bootargs}" \ 247 " console=ttymxc0,${baudrate}\0" \ 248 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 249 "loadaddr=80800000\0" \ 250 "kernel_addr_r=80800000\0" \ 251 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 252 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 253 "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \ 254 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 255 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 256 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 257 "bootm ${kernel_addr}\0" \ 258 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 259 "run nfsargs addip addtty addmtd addmisc;" \ 260 "bootm ${kernel_addr_r}\0" \ 261 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \ 262 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \ 263 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \ 264 "load=tftp ${loadaddr} ${u-boot}\0" \ 265 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \ 266 "update=protect off ${uboot_addr} +80000;" \ 267 "erase ${uboot_addr} +80000;" \ 268 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \ 269 "upd=if run load;then echo Updating u-boot;if run update;" \ 270 "then echo U-Boot updated;" \ 271 "else echo Error updating u-boot !;" \ 272 "echo Board without bootloader !!;" \ 273 "fi;" \ 274 "else echo U-Boot not downloaded..exiting;fi\0" \ 275 "bootcmd=run net_nfs\0" 276 277 #endif /* __CONFIG_H */ 278