xref: /openbmc/u-boot/include/configs/mx35pdk.h (revision be059e88)
1 /*
2  * (C) Copyright 2010, Stefano Babic <sbabic@denx.de>
3  *
4  * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
5  *
6  * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
7  *
8  * Configuration for the MX35pdk Freescale board.
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #ifndef __CONFIG_H
14 #define __CONFIG_H
15 
16 #include <asm/arch/imx-regs.h>
17 
18  /* High Level Configuration Options */
19 #define CONFIG_MX35
20 
21 #define CONFIG_SYS_FSL_CLK
22 
23 /* Set TEXT at the beginning of the NOR flash */
24 #define CONFIG_SYS_TEXT_BASE	0xA0000000
25 
26 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
27 #define CONFIG_REVISION_TAG
28 #define CONFIG_SETUP_MEMORY_TAGS
29 #define CONFIG_INITRD_TAG
30 
31 /*
32  * Size of malloc() pool
33  */
34 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1024 * 1024)
35 
36 /*
37  * Hardware drivers
38  */
39 #define CONFIG_SYS_I2C
40 #define CONFIG_SYS_I2C_MXC
41 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
42 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
43 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
44 #define CONFIG_MXC_SPI
45 #define CONFIG_MXC_GPIO
46 
47 /*
48  * PMIC Configs
49  */
50 #define CONFIG_POWER
51 #define CONFIG_POWER_I2C
52 #define CONFIG_POWER_FSL
53 #define CONFIG_POWER_FSL_MC13892
54 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR	0x08
55 #define CONFIG_RTC_MC13XXX
56 
57 /*
58  * MFD MC9SDZ60
59  */
60 #define CONFIG_FSL_MC9SDZ60
61 #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR	0x69
62 
63 /*
64  * UART (console)
65  */
66 #define CONFIG_MXC_UART
67 #define CONFIG_MXC_UART_BASE	UART1_BASE
68 
69 /* allow to overwrite serial and ethaddr */
70 #define CONFIG_ENV_OVERWRITE
71 #define CONFIG_CONS_INDEX	1
72 #define CONFIG_BAUDRATE		115200
73 
74 /*
75  * Command definition
76  */
77 #define CONFIG_BOOTP_SUBNETMASK
78 #define CONFIG_BOOTP_GATEWAY
79 #define CONFIG_BOOTP_DNS
80 
81 #define CONFIG_CMD_NAND
82 
83 #define CONFIG_NET_RETRY_COUNT	100
84 #define CONFIG_CMD_DATE
85 
86 
87 #define CONFIG_LOADADDR		0x80800000	/* loadaddr env var */
88 
89 /*
90  * Ethernet on the debug board (SMC911)
91  */
92 #define CONFIG_SMC911X
93 #define CONFIG_SMC911X_16_BIT 1
94 #define CONFIG_SMC911X_BASE CS5_BASE_ADDR
95 
96 #define CONFIG_HAS_ETH1
97 #define CONFIG_ETHPRIME
98 
99 /*
100  * Ethernet on SOC (FEC)
101  */
102 #define CONFIG_FEC_MXC
103 #define IMX_FEC_BASE	FEC_BASE_ADDR
104 #define CONFIG_FEC_MXC_PHYADDR	0x1F
105 
106 #define CONFIG_MII
107 
108 #define CONFIG_ARP_TIMEOUT	200UL
109 
110 /*
111  * Miscellaneous configurable options
112  */
113 #define CONFIG_SYS_LONGHELP	/* undef to save memory */
114 #define CONFIG_CMDLINE_EDITING
115 
116 #define CONFIG_AUTO_COMPLETE
117 #define CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size */
118 #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
119 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
120 
121 #define CONFIG_SYS_MEMTEST_START	0	/* memtest works on */
122 #define CONFIG_SYS_MEMTEST_END		0x10000
123 
124 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
125 
126 /*
127  * Physical Memory Map
128  */
129 #define CONFIG_NR_DRAM_BANKS	2
130 #define PHYS_SDRAM_1		CSD0_BASE_ADDR
131 #define PHYS_SDRAM_1_SIZE	(128 * 1024 * 1024)
132 #define PHYS_SDRAM_2		CSD1_BASE_ADDR
133 #define PHYS_SDRAM_2_SIZE	(128 * 1024 * 1024)
134 
135 #define CONFIG_SYS_SDRAM_BASE		CSD0_BASE_ADDR
136 #define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR + 0x10000)
137 #define CONFIG_SYS_INIT_RAM_SIZE		(IRAM_SIZE / 2)
138 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
139 					GENERATED_GBL_DATA_SIZE)
140 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
141 					CONFIG_SYS_GBL_DATA_OFFSET)
142 
143 /*
144  * MTD Command for mtdparts
145  */
146 #define CONFIG_CMD_MTDPARTS
147 #define CONFIG_MTD_DEVICE
148 #define CONFIG_FLASH_CFI_MTD
149 #define CONFIG_MTD_PARTITIONS
150 #define MTDIDS_DEFAULT		"nand0=mxc_nand,nor0=physmap-flash.0"
151 #define MTDPARTS_DEFAULT	"mtdparts=mxc_nand:1m(boot),5m(linux),"	\
152 				"96m(root),8m(cfg),1938m(user);"	\
153 				"physmap-flash.0:512k(b),4m(k),30m(u),28m(r)"
154 
155 /*
156  * FLASH and environment organization
157  */
158 #define CONFIG_SYS_FLASH_BASE		CS0_BASE_ADDR
159 #define CONFIG_SYS_MAX_FLASH_BANKS 1	/* max number of memory banks */
160 #define CONFIG_SYS_MAX_FLASH_SECT 512	/* max number of sectors on one chip */
161 /* Monitor at beginning of flash */
162 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
163 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
164 
165 #define CONFIG_ENV_SECT_SIZE	(128 * 1024)
166 #define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
167 
168 /* Address and size of Redundant Environment Sector	*/
169 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
170 #define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE
171 
172 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + \
173 				CONFIG_SYS_MONITOR_LEN)
174 
175 #define CONFIG_ENV_IS_IN_FLASH
176 
177 #if defined(CONFIG_FSL_ENV_IN_NAND)
178 	#define CONFIG_ENV_IS_IN_NAND
179 	#define CONFIG_ENV_OFFSET       (1024 * 1024)
180 #endif
181 
182 /*
183  * CFI FLASH driver setup
184  */
185 #define CONFIG_SYS_FLASH_CFI		/* Flash memory is CFI compliant */
186 #define CONFIG_FLASH_CFI_DRIVER
187 
188 /* A non-standard buffered write algorithm */
189 #define CONFIG_FLASH_SPANSION_S29WS_N
190 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/* faster */
191 #define CONFIG_SYS_FLASH_PROTECTION	/* Use hardware sector protection */
192 
193 /*
194  * NAND FLASH driver setup
195  */
196 #define CONFIG_NAND_MXC
197 #define CONFIG_MXC_NAND_REGS_BASE	(NFC_BASE_ADDR)
198 #define CONFIG_SYS_MAX_NAND_DEVICE	1
199 #define CONFIG_SYS_NAND_BASE		(NFC_BASE_ADDR)
200 #define CONFIG_MXC_NAND_HWECC
201 #define CONFIG_SYS_NAND_LARGEPAGE
202 
203 /* EHCI driver */
204 #define CONFIG_USB_EHCI
205 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	1
206 #define CONFIG_EHCI_IS_TDI
207 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
208 #define CONFIG_USB_EHCI_MXC
209 #define CONFIG_MXC_USB_PORT	0
210 #define CONFIG_MXC_USB_FLAGS	(MXC_EHCI_INTERFACE_DIFF_UNI | \
211 				 MXC_EHCI_POWER_PINS_ENABLED | \
212 				 MXC_EHCI_OC_PIN_ACTIVE_LOW)
213 #define CONFIG_MXC_USB_PORTSC	(MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI)
214 
215 /* mmc driver */
216 #define CONFIG_FSL_ESDHC
217 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
218 #define CONFIG_SYS_FSL_ESDHC_NUM	1
219 
220 /*
221  * Default environment and default scripts
222  * to update uboot and load kernel
223  */
224 
225 #define CONFIG_HOSTNAME "mx35pdk"
226 #define	CONFIG_EXTRA_ENV_SETTINGS					\
227 	"netdev=eth1\0"							\
228 	"ethprime=smc911x\0"						\
229 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
230 		"nfsroot=${serverip}:${rootpath}\0"			\
231 	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
232 	"addip_sta=setenv bootargs ${bootargs} "			\
233 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
234 		":${hostname}:${netdev}:off panic=1\0"			\
235 	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"		\
236 	"addip=if test -n ${ipdyn};then run addip_dyn;"			\
237 		"else run addip_sta;fi\0"				\
238 	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
239 	"addtty=setenv bootargs ${bootargs}"				\
240 		" console=ttymxc0,${baudrate}\0"			\
241 	"addmisc=setenv bootargs ${bootargs} ${misc}\0"			\
242 	"loadaddr=80800000\0"						\
243 	"kernel_addr_r=80800000\0"					\
244 	"hostname=" __stringify(CONFIG_HOSTNAME) "\0"			\
245 	"bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"		\
246 	"ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0"	\
247 	"flash_self=run ramargs addip addtty addmtd addmisc;"		\
248 		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
249 	"flash_nfs=run nfsargs addip addtty addmtd addmisc;"		\
250 		"bootm ${kernel_addr}\0"				\
251 	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
252 		"run nfsargs addip addtty addmtd addmisc;"		\
253 		"bootm ${kernel_addr_r}\0"				\
254 	"net_self_load=tftp ${kernel_addr_r} ${bootfile};"		\
255 		"tftp ${ramdisk_addr_r} ${ramdisk_file};\0"		\
256 	"u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0"		\
257 	"load=tftp ${loadaddr} ${u-boot}\0"				\
258 	"uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0"		\
259 	"update=protect off ${uboot_addr} +80000;"			\
260 		"erase ${uboot_addr} +80000;"				\
261 		"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0"		\
262 	"upd=if run load;then echo Updating u-boot;if run update;"	\
263 		"then echo U-Boot updated;"				\
264 			"else echo Error updating u-boot !;"		\
265 			"echo Board without bootloader !!;"		\
266 		"fi;"							\
267 		"else echo U-Boot not downloaded..exiting;fi\0"		\
268 	"bootcmd=run net_nfs\0"
269 
270 #endif				/* __CONFIG_H */
271