1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2010, Stefano Babic <sbabic@denx.de> 4 * 5 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. 6 * 7 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 8 * 9 * Configuration for the MX35pdk Freescale board. 10 */ 11 12 #ifndef __CONFIG_H 13 #define __CONFIG_H 14 15 #include <asm/arch/imx-regs.h> 16 17 /* High Level Configuration Options */ 18 #define CONFIG_MX35 19 20 #define CONFIG_SYS_FSL_CLK 21 22 /* Set TEXT at the beginning of the NOR flash */ 23 24 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 25 #define CONFIG_REVISION_TAG 26 #define CONFIG_SETUP_MEMORY_TAGS 27 #define CONFIG_INITRD_TAG 28 29 /* 30 * Size of malloc() pool 31 */ 32 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) 33 34 /* 35 * Hardware drivers 36 */ 37 #define CONFIG_SYS_I2C 38 #define CONFIG_SYS_I2C_MXC 39 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 40 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 41 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 42 43 /* 44 * PMIC Configs 45 */ 46 #define CONFIG_POWER 47 #define CONFIG_POWER_I2C 48 #define CONFIG_POWER_FSL 49 #define CONFIG_POWER_FSL_MC13892 50 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08 51 #define CONFIG_RTC_MC13XXX 52 53 /* 54 * MFD MC9SDZ60 55 */ 56 #define CONFIG_FSL_MC9SDZ60 57 #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69 58 59 /* 60 * UART (console) 61 */ 62 #define CONFIG_MXC_UART 63 #define CONFIG_MXC_UART_BASE UART1_BASE 64 65 /* allow to overwrite serial and ethaddr */ 66 #define CONFIG_ENV_OVERWRITE 67 68 /* 69 * Command definition 70 */ 71 72 #define CONFIG_NET_RETRY_COUNT 100 73 74 75 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ 76 77 /* 78 * Ethernet on the debug board (SMC911) 79 */ 80 #define CONFIG_HAS_ETH1 81 #define CONFIG_ETHPRIME 82 83 /* 84 * Ethernet on SOC (FEC) 85 */ 86 #define CONFIG_FEC_MXC 87 #define IMX_FEC_BASE FEC_BASE_ADDR 88 #define CONFIG_FEC_MXC_PHYADDR 0x1F 89 90 #define CONFIG_MII 91 92 #define CONFIG_ARP_TIMEOUT 200UL 93 94 /* 95 * Miscellaneous configurable options 96 */ 97 98 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 99 #define CONFIG_SYS_MEMTEST_END 0x10000 100 101 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 102 103 /* 104 * Physical Memory Map 105 */ 106 #define CONFIG_NR_DRAM_BANKS 2 107 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 108 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) 109 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 110 #define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024) 111 112 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR 113 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000) 114 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2) 115 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 116 GENERATED_GBL_DATA_SIZE) 117 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 118 CONFIG_SYS_GBL_DATA_OFFSET) 119 120 /* 121 * MTD Command for mtdparts 122 */ 123 #define CONFIG_MTD_DEVICE 124 #define CONFIG_FLASH_CFI_MTD 125 #define CONFIG_MTD_PARTITIONS 126 127 /* 128 * FLASH and environment organization 129 */ 130 #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR 131 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 132 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ 133 /* Monitor at beginning of flash */ 134 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 135 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 136 137 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 138 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 139 140 /* Address and size of Redundant Environment Sector */ 141 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 142 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 143 144 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ 145 CONFIG_SYS_MONITOR_LEN) 146 147 #if defined(CONFIG_FSL_ENV_IN_NAND) 148 #define CONFIG_ENV_OFFSET (1024 * 1024) 149 #endif 150 151 /* 152 * CFI FLASH driver setup 153 */ 154 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 155 #define CONFIG_FLASH_CFI_DRIVER 156 157 /* A non-standard buffered write algorithm */ 158 #define CONFIG_FLASH_SPANSION_S29WS_N 159 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ 160 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ 161 162 /* 163 * NAND FLASH driver setup 164 */ 165 #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR) 166 #define CONFIG_SYS_MAX_NAND_DEVICE 1 167 #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR) 168 #define CONFIG_MXC_NAND_HWECC 169 #define CONFIG_SYS_NAND_LARGEPAGE 170 171 /* EHCI driver */ 172 #define CONFIG_EHCI_IS_TDI 173 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 174 #define CONFIG_USB_EHCI_MXC 175 #define CONFIG_MXC_USB_PORT 0 176 #define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERFACE_DIFF_UNI | \ 177 MXC_EHCI_POWER_PINS_ENABLED | \ 178 MXC_EHCI_OC_PIN_ACTIVE_LOW) 179 #define CONFIG_MXC_USB_PORTSC (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI) 180 181 /* mmc driver */ 182 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 183 #define CONFIG_SYS_FSL_ESDHC_NUM 1 184 185 /* 186 * Default environment and default scripts 187 * to update uboot and load kernel 188 */ 189 190 #define CONFIG_HOSTNAME "mx35pdk" 191 #define CONFIG_EXTRA_ENV_SETTINGS \ 192 "netdev=eth1\0" \ 193 "ethprime=smc911x\0" \ 194 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 195 "nfsroot=${serverip}:${rootpath}\0" \ 196 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 197 "addip_sta=setenv bootargs ${bootargs} " \ 198 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 199 ":${hostname}:${netdev}:off panic=1\0" \ 200 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 201 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 202 "else run addip_sta;fi\0" \ 203 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 204 "addtty=setenv bootargs ${bootargs}" \ 205 " console=ttymxc0,${baudrate}\0" \ 206 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 207 "loadaddr=80800000\0" \ 208 "kernel_addr_r=80800000\0" \ 209 "hostname=" CONFIG_HOSTNAME "\0" \ 210 "bootfile=" CONFIG_HOSTNAME "/uImage\0" \ 211 "ramdisk_file=" CONFIG_HOSTNAME "/uRamdisk\0" \ 212 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 213 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 214 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 215 "bootm ${kernel_addr}\0" \ 216 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 217 "run nfsargs addip addtty addmtd addmisc;" \ 218 "bootm ${kernel_addr_r}\0" \ 219 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \ 220 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \ 221 "u-boot=" CONFIG_HOSTNAME "/u-boot.bin\0" \ 222 "load=tftp ${loadaddr} ${u-boot}\0" \ 223 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \ 224 "update=protect off ${uboot_addr} +80000;" \ 225 "erase ${uboot_addr} +80000;" \ 226 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \ 227 "upd=if run load;then echo Updating u-boot;if run update;" \ 228 "then echo U-Boot updated;" \ 229 "else echo Error updating u-boot !;" \ 230 "echo Board without bootloader !!;" \ 231 "fi;" \ 232 "else echo U-Boot not downloaded..exiting;fi\0" \ 233 "bootcmd=run net_nfs\0" 234 235 #endif /* __CONFIG_H */ 236