1 /* 2 * (C) Copyright 2010, Stefano Babic <sbabic@denx.de> 3 * 4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. 5 * 6 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 7 * 8 * Configuration for the MX35pdk Freescale board. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_H 14 #define __CONFIG_H 15 16 #include <asm/arch/imx-regs.h> 17 18 /* High Level Configuration Options */ 19 #define CONFIG_ARM1136 /* This is an arm1136 CPU core */ 20 #define CONFIG_MX35 21 22 #define CONFIG_DISPLAY_CPUINFO 23 24 /* Set TEXT at the beginning of the NOR flash */ 25 #define CONFIG_SYS_TEXT_BASE 0xA0000000 26 27 #define CONFIG_BOARD_EARLY_INIT_F 28 #define CONFIG_BOARD_LATE_INIT 29 30 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 31 #define CONFIG_REVISION_TAG 32 #define CONFIG_SETUP_MEMORY_TAGS 33 #define CONFIG_INITRD_TAG 34 35 /* 36 * Size of malloc() pool 37 */ 38 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) 39 40 /* 41 * Hardware drivers 42 */ 43 #define CONFIG_SYS_I2C 44 #define CONFIG_SYS_I2C_MXC 45 #define CONFIG_MXC_SPI 46 #define CONFIG_MXC_GPIO 47 48 49 /* 50 * PMIC Configs 51 */ 52 #define CONFIG_POWER 53 #define CONFIG_POWER_I2C 54 #define CONFIG_POWER_FSL 55 #define CONFIG_PMIC_FSL_MC13892 56 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08 57 #define CONFIG_RTC_MC13XXX 58 59 /* 60 * MFD MC9SDZ60 61 */ 62 #define CONFIG_FSL_MC9SDZ60 63 #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69 64 65 /* 66 * UART (console) 67 */ 68 #define CONFIG_MXC_UART 69 #define CONFIG_MXC_UART_BASE UART1_BASE 70 71 /* allow to overwrite serial and ethaddr */ 72 #define CONFIG_ENV_OVERWRITE 73 #define CONFIG_CONS_INDEX 1 74 #define CONFIG_BAUDRATE 115200 75 76 /* 77 * Command definition 78 */ 79 80 #include <config_cmd_default.h> 81 82 #define CONFIG_OF_LIBFDT 83 #define CONFIG_CMD_BOOTZ 84 #define CONFIG_CMD_PING 85 #define CONFIG_CMD_DHCP 86 #define CONFIG_BOOTP_SUBNETMASK 87 #define CONFIG_BOOTP_GATEWAY 88 #define CONFIG_BOOTP_DNS 89 90 #define CONFIG_CMD_NAND 91 #define CONFIG_CMD_CACHE 92 93 #define CONFIG_CMD_I2C 94 #define CONFIG_CMD_SPI 95 #define CONFIG_CMD_MII 96 #define CONFIG_CMD_NET 97 #define CONFIG_NET_RETRY_COUNT 100 98 #define CONFIG_CMD_DATE 99 100 #define CONFIG_CMD_USB 101 #define CONFIG_USB_STORAGE 102 #define CONFIG_CMD_MMC 103 #define CONFIG_DOS_PARTITION 104 #define CONFIG_EFI_PARTITION 105 #define CONFIG_CMD_EXT2 106 #define CONFIG_CMD_FAT 107 108 #define CONFIG_BOOTDELAY 1 109 110 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ 111 112 /* 113 * Ethernet on the debug board (SMC911) 114 */ 115 #define CONFIG_SMC911X 116 #define CONFIG_SMC911X_16_BIT 1 117 #define CONFIG_SMC911X_BASE CS5_BASE_ADDR 118 119 #define CONFIG_HAS_ETH1 120 #define CONFIG_ETHPRIME 121 122 /* 123 * Ethernet on SOC (FEC) 124 */ 125 #define CONFIG_FEC_MXC 126 #define IMX_FEC_BASE FEC_BASE_ADDR 127 #define CONFIG_FEC_MXC_PHYADDR 0x1F 128 129 #define CONFIG_MII 130 131 #define CONFIG_ARP_TIMEOUT 200UL 132 133 /* 134 * Miscellaneous configurable options 135 */ 136 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 137 #define CONFIG_CMDLINE_EDITING 138 #define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */ 139 140 #define CONFIG_AUTO_COMPLETE 141 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 142 /* Print Buffer Size */ 143 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 144 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 145 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 146 147 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 148 #define CONFIG_SYS_MEMTEST_END 0x10000 149 150 #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ 151 152 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 153 154 /* 155 * Physical Memory Map 156 */ 157 #define CONFIG_NR_DRAM_BANKS 2 158 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 159 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) 160 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 161 #define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024) 162 163 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR 164 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000) 165 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2) 166 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 167 GENERATED_GBL_DATA_SIZE) 168 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 169 CONFIG_SYS_GBL_DATA_OFFSET) 170 171 /* 172 * MTD Command for mtdparts 173 */ 174 #define CONFIG_CMD_MTDPARTS 175 #define CONFIG_MTD_DEVICE 176 #define CONFIG_FLASH_CFI_MTD 177 #define CONFIG_MTD_PARTITIONS 178 #define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0" 179 #define MTDPARTS_DEFAULT "mtdparts=mxc_nand:1m(boot),5m(linux)," \ 180 "96m(root),8m(cfg),1938m(user);" \ 181 "physmap-flash.0:512k(b),4m(k),30m(u),28m(r)" 182 183 /* 184 * FLASH and environment organization 185 */ 186 #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR 187 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 188 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ 189 /* Monitor at beginning of flash */ 190 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 191 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 192 193 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 194 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 195 196 /* Address and size of Redundant Environment Sector */ 197 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 198 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 199 200 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ 201 CONFIG_SYS_MONITOR_LEN) 202 203 #define CONFIG_ENV_IS_IN_FLASH 204 205 #if defined(CONFIG_FSL_ENV_IN_NAND) 206 #define CONFIG_ENV_IS_IN_NAND 207 #define CONFIG_ENV_OFFSET (1024 * 1024) 208 #endif 209 210 /* 211 * CFI FLASH driver setup 212 */ 213 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 214 #define CONFIG_FLASH_CFI_DRIVER 215 216 /* A non-standard buffered write algorithm */ 217 #define CONFIG_FLASH_SPANSION_S29WS_N 218 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ 219 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ 220 221 /* 222 * NAND FLASH driver setup 223 */ 224 #define CONFIG_NAND_MXC 225 #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR) 226 #define CONFIG_SYS_MAX_NAND_DEVICE 1 227 #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR) 228 #define CONFIG_MXC_NAND_HWECC 229 #define CONFIG_SYS_NAND_LARGEPAGE 230 231 /* EHCI driver */ 232 #define CONFIG_USB_EHCI 233 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 234 #define CONFIG_EHCI_IS_TDI 235 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 236 #define CONFIG_USB_EHCI_MXC 237 #define CONFIG_MXC_USB_PORT 0 238 #define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERFACE_DIFF_UNI | \ 239 MXC_EHCI_POWER_PINS_ENABLED | \ 240 MXC_EHCI_OC_PIN_ACTIVE_LOW) 241 #define CONFIG_MXC_USB_PORTSC (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI) 242 243 /* mmc driver */ 244 #define CONFIG_MMC 245 #define CONFIG_GENERIC_MMC 246 #define CONFIG_FSL_ESDHC 247 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 248 #define CONFIG_SYS_FSL_ESDHC_NUM 1 249 250 /* 251 * Default environment and default scripts 252 * to update uboot and load kernel 253 */ 254 255 #define CONFIG_HOSTNAME "mx35pdk" 256 #define CONFIG_EXTRA_ENV_SETTINGS \ 257 "netdev=eth1\0" \ 258 "ethprime=smc911x\0" \ 259 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 260 "nfsroot=${serverip}:${rootpath}\0" \ 261 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 262 "addip_sta=setenv bootargs ${bootargs} " \ 263 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 264 ":${hostname}:${netdev}:off panic=1\0" \ 265 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 266 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 267 "else run addip_sta;fi\0" \ 268 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 269 "addtty=setenv bootargs ${bootargs}" \ 270 " console=ttymxc0,${baudrate}\0" \ 271 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 272 "loadaddr=80800000\0" \ 273 "kernel_addr_r=80800000\0" \ 274 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 275 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 276 "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \ 277 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 278 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 279 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 280 "bootm ${kernel_addr}\0" \ 281 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 282 "run nfsargs addip addtty addmtd addmisc;" \ 283 "bootm ${kernel_addr_r}\0" \ 284 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \ 285 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \ 286 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \ 287 "load=tftp ${loadaddr} ${u-boot}\0" \ 288 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \ 289 "update=protect off ${uboot_addr} +80000;" \ 290 "erase ${uboot_addr} +80000;" \ 291 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \ 292 "upd=if run load;then echo Updating u-boot;if run update;" \ 293 "then echo U-Boot updated;" \ 294 "else echo Error updating u-boot !;" \ 295 "echo Board without bootloader !!;" \ 296 "fi;" \ 297 "else echo U-Boot not downloaded..exiting;fi\0" \ 298 "bootcmd=run net_nfs\0" 299 300 #endif /* __CONFIG_H */ 301