xref: /openbmc/u-boot/include/configs/mx35pdk.h (revision 86a390d3)
1 /*
2  * (C) Copyright 2010, Stefano Babic <sbabic@denx.de>
3  *
4  * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
5  *
6  * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
7  *
8  * Configuration for the MX35pdk Freescale board.
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #ifndef __CONFIG_H
14 #define __CONFIG_H
15 
16 #include <asm/arch/imx-regs.h>
17 
18  /* High Level Configuration Options */
19 #define CONFIG_MX35
20 
21 #define CONFIG_DISPLAY_CPUINFO
22 
23 /* Set TEXT at the beginning of the NOR flash */
24 #define CONFIG_SYS_TEXT_BASE	0xA0000000
25 
26 #define CONFIG_BOARD_EARLY_INIT_F
27 #define CONFIG_BOARD_LATE_INIT
28 
29 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
30 #define CONFIG_REVISION_TAG
31 #define CONFIG_SETUP_MEMORY_TAGS
32 #define CONFIG_INITRD_TAG
33 
34 /*
35  * Size of malloc() pool
36  */
37 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1024 * 1024)
38 
39 /*
40  * Hardware drivers
41  */
42 #define CONFIG_SYS_I2C
43 #define CONFIG_SYS_I2C_MXC
44 #define CONFIG_MXC_SPI
45 #define CONFIG_MXC_GPIO
46 
47 
48 /*
49  * PMIC Configs
50  */
51 #define CONFIG_POWER
52 #define CONFIG_POWER_I2C
53 #define CONFIG_POWER_FSL
54 #define CONFIG_POWER_FSL_MC13892
55 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR	0x08
56 #define CONFIG_RTC_MC13XXX
57 
58 /*
59  * MFD MC9SDZ60
60  */
61 #define CONFIG_FSL_MC9SDZ60
62 #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR	0x69
63 
64 /*
65  * UART (console)
66  */
67 #define CONFIG_MXC_UART
68 #define CONFIG_MXC_UART_BASE	UART1_BASE
69 
70 /* allow to overwrite serial and ethaddr */
71 #define CONFIG_ENV_OVERWRITE
72 #define CONFIG_CONS_INDEX	1
73 #define CONFIG_BAUDRATE		115200
74 
75 /*
76  * Command definition
77  */
78 
79 #include <config_cmd_default.h>
80 
81 #define CONFIG_OF_LIBFDT
82 #define CONFIG_CMD_BOOTZ
83 #define CONFIG_CMD_PING
84 #define CONFIG_CMD_DHCP
85 #define CONFIG_BOOTP_SUBNETMASK
86 #define CONFIG_BOOTP_GATEWAY
87 #define CONFIG_BOOTP_DNS
88 
89 #define CONFIG_CMD_NAND
90 #define CONFIG_CMD_CACHE
91 
92 #define CONFIG_CMD_I2C
93 #define CONFIG_CMD_SPI
94 #define CONFIG_CMD_MII
95 #define CONFIG_CMD_NET
96 #define CONFIG_NET_RETRY_COUNT	100
97 #define CONFIG_CMD_DATE
98 
99 #define CONFIG_CMD_USB
100 #define CONFIG_USB_STORAGE
101 #define CONFIG_CMD_MMC
102 #define CONFIG_DOS_PARTITION
103 #define CONFIG_EFI_PARTITION
104 #define CONFIG_CMD_EXT2
105 #define CONFIG_CMD_FAT
106 
107 #define CONFIG_BOOTDELAY	1
108 
109 #define CONFIG_LOADADDR		0x80800000	/* loadaddr env var */
110 
111 /*
112  * Ethernet on the debug board (SMC911)
113  */
114 #define CONFIG_SMC911X
115 #define CONFIG_SMC911X_16_BIT 1
116 #define CONFIG_SMC911X_BASE CS5_BASE_ADDR
117 
118 #define CONFIG_HAS_ETH1
119 #define CONFIG_ETHPRIME
120 
121 /*
122  * Ethernet on SOC (FEC)
123  */
124 #define CONFIG_FEC_MXC
125 #define IMX_FEC_BASE	FEC_BASE_ADDR
126 #define CONFIG_FEC_MXC_PHYADDR	0x1F
127 
128 #define CONFIG_MII
129 
130 #define CONFIG_ARP_TIMEOUT	200UL
131 
132 /*
133  * Miscellaneous configurable options
134  */
135 #define CONFIG_SYS_LONGHELP	/* undef to save memory */
136 #define CONFIG_CMDLINE_EDITING
137 #define CONFIG_SYS_HUSH_PARSER	/* Use the HUSH parser */
138 
139 #define CONFIG_AUTO_COMPLETE
140 #define CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size */
141 /* Print Buffer Size */
142 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
143 #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
144 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
145 
146 #define CONFIG_SYS_MEMTEST_START	0	/* memtest works on */
147 #define CONFIG_SYS_MEMTEST_END		0x10000
148 
149 #undef	CONFIG_SYS_CLKS_IN_HZ	/* everything, incl board info, in Hz */
150 
151 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
152 
153 /*
154  * Physical Memory Map
155  */
156 #define CONFIG_NR_DRAM_BANKS	2
157 #define PHYS_SDRAM_1		CSD0_BASE_ADDR
158 #define PHYS_SDRAM_1_SIZE	(128 * 1024 * 1024)
159 #define PHYS_SDRAM_2		CSD1_BASE_ADDR
160 #define PHYS_SDRAM_2_SIZE	(128 * 1024 * 1024)
161 
162 #define CONFIG_SYS_SDRAM_BASE		CSD0_BASE_ADDR
163 #define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR + 0x10000)
164 #define CONFIG_SYS_INIT_RAM_SIZE		(IRAM_SIZE / 2)
165 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
166 					GENERATED_GBL_DATA_SIZE)
167 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
168 					CONFIG_SYS_GBL_DATA_OFFSET)
169 
170 /*
171  * MTD Command for mtdparts
172  */
173 #define CONFIG_CMD_MTDPARTS
174 #define CONFIG_MTD_DEVICE
175 #define CONFIG_FLASH_CFI_MTD
176 #define CONFIG_MTD_PARTITIONS
177 #define MTDIDS_DEFAULT		"nand0=mxc_nand,nor0=physmap-flash.0"
178 #define MTDPARTS_DEFAULT	"mtdparts=mxc_nand:1m(boot),5m(linux),"	\
179 				"96m(root),8m(cfg),1938m(user);"	\
180 				"physmap-flash.0:512k(b),4m(k),30m(u),28m(r)"
181 
182 /*
183  * FLASH and environment organization
184  */
185 #define CONFIG_SYS_FLASH_BASE		CS0_BASE_ADDR
186 #define CONFIG_SYS_MAX_FLASH_BANKS 1	/* max number of memory banks */
187 #define CONFIG_SYS_MAX_FLASH_SECT 512	/* max number of sectors on one chip */
188 /* Monitor at beginning of flash */
189 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
190 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
191 
192 #define CONFIG_ENV_SECT_SIZE	(128 * 1024)
193 #define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
194 
195 /* Address and size of Redundant Environment Sector	*/
196 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
197 #define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE
198 
199 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + \
200 				CONFIG_SYS_MONITOR_LEN)
201 
202 #define CONFIG_ENV_IS_IN_FLASH
203 
204 #if defined(CONFIG_FSL_ENV_IN_NAND)
205 	#define CONFIG_ENV_IS_IN_NAND
206 	#define CONFIG_ENV_OFFSET       (1024 * 1024)
207 #endif
208 
209 /*
210  * CFI FLASH driver setup
211  */
212 #define CONFIG_SYS_FLASH_CFI		/* Flash memory is CFI compliant */
213 #define CONFIG_FLASH_CFI_DRIVER
214 
215 /* A non-standard buffered write algorithm */
216 #define CONFIG_FLASH_SPANSION_S29WS_N
217 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/* faster */
218 #define CONFIG_SYS_FLASH_PROTECTION	/* Use hardware sector protection */
219 
220 /*
221  * NAND FLASH driver setup
222  */
223 #define CONFIG_NAND_MXC
224 #define CONFIG_MXC_NAND_REGS_BASE	(NFC_BASE_ADDR)
225 #define CONFIG_SYS_MAX_NAND_DEVICE	1
226 #define CONFIG_SYS_NAND_BASE		(NFC_BASE_ADDR)
227 #define CONFIG_MXC_NAND_HWECC
228 #define CONFIG_SYS_NAND_LARGEPAGE
229 
230 /* EHCI driver */
231 #define CONFIG_USB_EHCI
232 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	1
233 #define CONFIG_EHCI_IS_TDI
234 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
235 #define CONFIG_USB_EHCI_MXC
236 #define CONFIG_MXC_USB_PORT	0
237 #define CONFIG_MXC_USB_FLAGS	(MXC_EHCI_INTERFACE_DIFF_UNI | \
238 				 MXC_EHCI_POWER_PINS_ENABLED | \
239 				 MXC_EHCI_OC_PIN_ACTIVE_LOW)
240 #define CONFIG_MXC_USB_PORTSC	(MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI)
241 
242 /* mmc driver */
243 #define CONFIG_MMC
244 #define CONFIG_GENERIC_MMC
245 #define CONFIG_FSL_ESDHC
246 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
247 #define CONFIG_SYS_FSL_ESDHC_NUM	1
248 
249 /*
250  * Default environment and default scripts
251  * to update uboot and load kernel
252  */
253 
254 #define CONFIG_HOSTNAME "mx35pdk"
255 #define	CONFIG_EXTRA_ENV_SETTINGS					\
256 	"netdev=eth1\0"							\
257 	"ethprime=smc911x\0"						\
258 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
259 		"nfsroot=${serverip}:${rootpath}\0"			\
260 	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
261 	"addip_sta=setenv bootargs ${bootargs} "			\
262 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
263 		":${hostname}:${netdev}:off panic=1\0"			\
264 	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"		\
265 	"addip=if test -n ${ipdyn};then run addip_dyn;"			\
266 		"else run addip_sta;fi\0"				\
267 	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
268 	"addtty=setenv bootargs ${bootargs}"				\
269 		" console=ttymxc0,${baudrate}\0"			\
270 	"addmisc=setenv bootargs ${bootargs} ${misc}\0"			\
271 	"loadaddr=80800000\0"						\
272 	"kernel_addr_r=80800000\0"					\
273 	"hostname=" __stringify(CONFIG_HOSTNAME) "\0"			\
274 	"bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"		\
275 	"ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0"	\
276 	"flash_self=run ramargs addip addtty addmtd addmisc;"		\
277 		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
278 	"flash_nfs=run nfsargs addip addtty addmtd addmisc;"		\
279 		"bootm ${kernel_addr}\0"				\
280 	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
281 		"run nfsargs addip addtty addmtd addmisc;"		\
282 		"bootm ${kernel_addr_r}\0"				\
283 	"net_self_load=tftp ${kernel_addr_r} ${bootfile};"		\
284 		"tftp ${ramdisk_addr_r} ${ramdisk_file};\0"		\
285 	"u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0"		\
286 	"load=tftp ${loadaddr} ${u-boot}\0"				\
287 	"uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0"		\
288 	"update=protect off ${uboot_addr} +80000;"			\
289 		"erase ${uboot_addr} +80000;"				\
290 		"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0"		\
291 	"upd=if run load;then echo Updating u-boot;if run update;"	\
292 		"then echo U-Boot updated;"				\
293 			"else echo Error updating u-boot !;"		\
294 			"echo Board without bootloader !!;"		\
295 		"fi;"							\
296 		"else echo U-Boot not downloaded..exiting;fi\0"		\
297 	"bootcmd=run net_nfs\0"
298 
299 #endif				/* __CONFIG_H */
300