1 /* 2 * (C) Copyright 2010, Stefano Babic <sbabic@denx.de> 3 * 4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. 5 * 6 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 7 * 8 * Configuration for the MX35pdk Freescale board. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_H 14 #define __CONFIG_H 15 16 #include <asm/arch/imx-regs.h> 17 18 /* High Level Configuration Options */ 19 #define CONFIG_ARM1136 /* This is an arm1136 CPU core */ 20 #define CONFIG_MX35 21 22 #define CONFIG_DISPLAY_CPUINFO 23 24 /* Set TEXT at the beginning of the NOR flash */ 25 #define CONFIG_SYS_TEXT_BASE 0xA0000000 26 #define CONFIG_SYS_CACHELINE_SIZE 32 27 28 #define CONFIG_BOARD_EARLY_INIT_F 29 #define CONFIG_BOARD_LATE_INIT 30 31 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 32 #define CONFIG_REVISION_TAG 33 #define CONFIG_SETUP_MEMORY_TAGS 34 #define CONFIG_INITRD_TAG 35 36 /* 37 * Size of malloc() pool 38 */ 39 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) 40 41 /* 42 * Hardware drivers 43 */ 44 #define CONFIG_HARD_I2C 45 #define CONFIG_I2C_MXC 46 #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR 47 #define CONFIG_SYS_I2C_SPEED 100000 48 #define CONFIG_MXC_SPI 49 #define CONFIG_MXC_GPIO 50 51 52 /* 53 * PMIC Configs 54 */ 55 #define CONFIG_POWER 56 #define CONFIG_POWER_I2C 57 #define CONFIG_POWER_FSL 58 #define CONFIG_PMIC_FSL_MC13892 59 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08 60 #define CONFIG_RTC_MC13XXX 61 62 /* 63 * MFD MC9SDZ60 64 */ 65 #define CONFIG_FSL_MC9SDZ60 66 #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69 67 68 /* 69 * UART (console) 70 */ 71 #define CONFIG_MXC_UART 72 #define CONFIG_MXC_UART_BASE UART1_BASE 73 74 /* allow to overwrite serial and ethaddr */ 75 #define CONFIG_ENV_OVERWRITE 76 #define CONFIG_CONS_INDEX 1 77 #define CONFIG_BAUDRATE 115200 78 79 /* 80 * Command definition 81 */ 82 83 #include <config_cmd_default.h> 84 85 #define CONFIG_OF_LIBFDT 86 #define CONFIG_CMD_BOOTZ 87 #define CONFIG_CMD_PING 88 #define CONFIG_CMD_DHCP 89 #define CONFIG_BOOTP_SUBNETMASK 90 #define CONFIG_BOOTP_GATEWAY 91 #define CONFIG_BOOTP_DNS 92 93 #define CONFIG_CMD_NAND 94 #define CONFIG_CMD_CACHE 95 96 #define CONFIG_CMD_I2C 97 #define CONFIG_CMD_SPI 98 #define CONFIG_CMD_MII 99 #define CONFIG_CMD_NET 100 #define CONFIG_NET_RETRY_COUNT 100 101 #define CONFIG_CMD_DATE 102 103 #define CONFIG_CMD_USB 104 #define CONFIG_USB_STORAGE 105 #define CONFIG_CMD_MMC 106 #define CONFIG_DOS_PARTITION 107 #define CONFIG_EFI_PARTITION 108 #define CONFIG_CMD_EXT2 109 #define CONFIG_CMD_FAT 110 111 #define CONFIG_BOOTDELAY 1 112 113 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ 114 115 /* 116 * Ethernet on the debug board (SMC911) 117 */ 118 #define CONFIG_SMC911X 119 #define CONFIG_SMC911X_16_BIT 1 120 #define CONFIG_SMC911X_BASE CS5_BASE_ADDR 121 122 #define CONFIG_HAS_ETH1 123 #define CONFIG_ETHPRIME 124 125 /* 126 * Ethernet on SOC (FEC) 127 */ 128 #define CONFIG_FEC_MXC 129 #define IMX_FEC_BASE FEC_BASE_ADDR 130 #define CONFIG_FEC_MXC_PHYADDR 0x1F 131 132 #define CONFIG_MII 133 134 #define CONFIG_ARP_TIMEOUT 200UL 135 136 /* 137 * Miscellaneous configurable options 138 */ 139 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 140 #define CONFIG_SYS_PROMPT "MX35 U-Boot > " 141 #define CONFIG_CMDLINE_EDITING 142 #define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */ 143 144 #define CONFIG_AUTO_COMPLETE 145 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 146 /* Print Buffer Size */ 147 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 148 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 149 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 150 151 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 152 #define CONFIG_SYS_MEMTEST_END 0x10000 153 154 #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ 155 156 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 157 158 #define CONFIG_SYS_HZ 1000 159 160 /* 161 * Physical Memory Map 162 */ 163 #define CONFIG_NR_DRAM_BANKS 2 164 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 165 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) 166 #define PHYS_SDRAM_2 CSD1_BASE_ADDR 167 #define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024) 168 169 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR 170 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000) 171 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2) 172 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 173 GENERATED_GBL_DATA_SIZE) 174 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 175 CONFIG_SYS_GBL_DATA_OFFSET) 176 177 /* 178 * MTD Command for mtdparts 179 */ 180 #define CONFIG_CMD_MTDPARTS 181 #define CONFIG_MTD_DEVICE 182 #define CONFIG_FLASH_CFI_MTD 183 #define CONFIG_MTD_PARTITIONS 184 #define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0" 185 #define MTDPARTS_DEFAULT "mtdparts=mxc_nand:1m(boot),5m(linux)," \ 186 "96m(root),8m(cfg),1938m(user);" \ 187 "physmap-flash.0:512k(b),4m(k),30m(u),28m(r)" 188 189 /* 190 * FLASH and environment organization 191 */ 192 #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR 193 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 194 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ 195 /* Monitor at beginning of flash */ 196 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 197 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 198 199 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 200 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 201 202 /* Address and size of Redundant Environment Sector */ 203 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 204 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 205 206 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ 207 CONFIG_SYS_MONITOR_LEN) 208 209 #define CONFIG_ENV_IS_IN_FLASH 210 211 #if defined(CONFIG_FSL_ENV_IN_NAND) 212 #define CONFIG_ENV_IS_IN_NAND 213 #define CONFIG_ENV_OFFSET (1024 * 1024) 214 #endif 215 216 /* 217 * CFI FLASH driver setup 218 */ 219 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 220 #define CONFIG_FLASH_CFI_DRIVER 221 222 /* A non-standard buffered write algorithm */ 223 #define CONFIG_FLASH_SPANSION_S29WS_N 224 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ 225 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ 226 227 /* 228 * NAND FLASH driver setup 229 */ 230 #define CONFIG_NAND_MXC 231 #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR) 232 #define CONFIG_SYS_MAX_NAND_DEVICE 1 233 #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR) 234 #define CONFIG_MXC_NAND_HWECC 235 #define CONFIG_SYS_NAND_LARGEPAGE 236 237 /* EHCI driver */ 238 #define CONFIG_USB_EHCI 239 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 240 #define CONFIG_EHCI_IS_TDI 241 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 242 #define CONFIG_USB_EHCI_MXC 243 #define CONFIG_MXC_USB_PORT 0 244 #define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERFACE_DIFF_UNI | \ 245 MXC_EHCI_POWER_PINS_ENABLED | \ 246 MXC_EHCI_OC_PIN_ACTIVE_LOW) 247 #define CONFIG_MXC_USB_PORTSC (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI) 248 249 /* mmc driver */ 250 #define CONFIG_MMC 251 #define CONFIG_GENERIC_MMC 252 #define CONFIG_FSL_ESDHC 253 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 254 #define CONFIG_SYS_FSL_ESDHC_NUM 1 255 256 /* 257 * Default environment and default scripts 258 * to update uboot and load kernel 259 */ 260 261 #define CONFIG_HOSTNAME "mx35pdk" 262 #define CONFIG_EXTRA_ENV_SETTINGS \ 263 "netdev=eth1\0" \ 264 "ethprime=smc911x\0" \ 265 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 266 "nfsroot=${serverip}:${rootpath}\0" \ 267 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 268 "addip_sta=setenv bootargs ${bootargs} " \ 269 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 270 ":${hostname}:${netdev}:off panic=1\0" \ 271 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 272 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 273 "else run addip_sta;fi\0" \ 274 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 275 "addtty=setenv bootargs ${bootargs}" \ 276 " console=ttymxc0,${baudrate}\0" \ 277 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 278 "loadaddr=80800000\0" \ 279 "kernel_addr_r=80800000\0" \ 280 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 281 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 282 "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \ 283 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 284 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 285 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 286 "bootm ${kernel_addr}\0" \ 287 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 288 "run nfsargs addip addtty addmtd addmisc;" \ 289 "bootm ${kernel_addr_r}\0" \ 290 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \ 291 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \ 292 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \ 293 "load=tftp ${loadaddr} ${u-boot}\0" \ 294 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \ 295 "update=protect off ${uboot_addr} +80000;" \ 296 "erase ${uboot_addr} +80000;" \ 297 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \ 298 "upd=if run load;then echo Updating u-boot;if run update;" \ 299 "then echo U-Boot updated;" \ 300 "else echo Error updating u-boot !;" \ 301 "echo Board without bootloader !!;" \ 302 "fi;" \ 303 "else echo U-Boot not downloaded..exiting;fi\0" \ 304 "bootcmd=run net_nfs\0" 305 306 #endif /* __CONFIG_H */ 307