xref: /openbmc/u-boot/include/configs/mx35pdk.h (revision 00a457b2)
1 /*
2  * (C) Copyright 2010, Stefano Babic <sbabic@denx.de>
3  *
4  * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
5  *
6  * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
7  *
8  * Configuration for the MX35pdk Freescale board.
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #ifndef __CONFIG_H
14 #define __CONFIG_H
15 
16 #include <asm/arch/imx-regs.h>
17 
18  /* High Level Configuration Options */
19 #define CONFIG_MX35
20 
21 #define CONFIG_DISPLAY_CPUINFO
22 #define CONFIG_SYS_FSL_CLK
23 
24 /* Set TEXT at the beginning of the NOR flash */
25 #define CONFIG_SYS_TEXT_BASE	0xA0000000
26 
27 #define CONFIG_BOARD_EARLY_INIT_F
28 #define CONFIG_BOARD_LATE_INIT
29 
30 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
31 #define CONFIG_REVISION_TAG
32 #define CONFIG_SETUP_MEMORY_TAGS
33 #define CONFIG_INITRD_TAG
34 
35 /*
36  * Size of malloc() pool
37  */
38 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1024 * 1024)
39 
40 /*
41  * Hardware drivers
42  */
43 #define CONFIG_SYS_I2C
44 #define CONFIG_SYS_I2C_MXC
45 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
46 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
47 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
48 #define CONFIG_MXC_SPI
49 #define CONFIG_MXC_GPIO
50 
51 
52 /*
53  * PMIC Configs
54  */
55 #define CONFIG_POWER
56 #define CONFIG_POWER_I2C
57 #define CONFIG_POWER_FSL
58 #define CONFIG_POWER_FSL_MC13892
59 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR	0x08
60 #define CONFIG_RTC_MC13XXX
61 
62 /*
63  * MFD MC9SDZ60
64  */
65 #define CONFIG_FSL_MC9SDZ60
66 #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR	0x69
67 
68 /*
69  * UART (console)
70  */
71 #define CONFIG_MXC_UART
72 #define CONFIG_MXC_UART_BASE	UART1_BASE
73 
74 /* allow to overwrite serial and ethaddr */
75 #define CONFIG_ENV_OVERWRITE
76 #define CONFIG_CONS_INDEX	1
77 #define CONFIG_BAUDRATE		115200
78 
79 /*
80  * Command definition
81  */
82 #define CONFIG_OF_LIBFDT
83 #define CONFIG_CMD_BOOTZ
84 #define CONFIG_CMD_PING
85 #define CONFIG_CMD_DHCP
86 #define CONFIG_BOOTP_SUBNETMASK
87 #define CONFIG_BOOTP_GATEWAY
88 #define CONFIG_BOOTP_DNS
89 
90 #define CONFIG_CMD_NAND
91 #define CONFIG_CMD_CACHE
92 
93 #define CONFIG_CMD_I2C
94 #define CONFIG_CMD_SPI
95 #define CONFIG_CMD_MII
96 #define CONFIG_NET_RETRY_COUNT	100
97 #define CONFIG_CMD_DATE
98 
99 #define CONFIG_CMD_USB
100 #define CONFIG_USB_STORAGE
101 #define CONFIG_CMD_MMC
102 #define CONFIG_DOS_PARTITION
103 #define CONFIG_EFI_PARTITION
104 #define CONFIG_CMD_EXT2
105 #define CONFIG_CMD_FAT
106 
107 #define CONFIG_BOOTDELAY	1
108 
109 #define CONFIG_LOADADDR		0x80800000	/* loadaddr env var */
110 
111 /*
112  * Ethernet on the debug board (SMC911)
113  */
114 #define CONFIG_SMC911X
115 #define CONFIG_SMC911X_16_BIT 1
116 #define CONFIG_SMC911X_BASE CS5_BASE_ADDR
117 
118 #define CONFIG_HAS_ETH1
119 #define CONFIG_ETHPRIME
120 
121 /*
122  * Ethernet on SOC (FEC)
123  */
124 #define CONFIG_FEC_MXC
125 #define IMX_FEC_BASE	FEC_BASE_ADDR
126 #define CONFIG_FEC_MXC_PHYADDR	0x1F
127 
128 #define CONFIG_MII
129 
130 #define CONFIG_ARP_TIMEOUT	200UL
131 
132 /*
133  * Miscellaneous configurable options
134  */
135 #define CONFIG_SYS_LONGHELP	/* undef to save memory */
136 #define CONFIG_CMDLINE_EDITING
137 #define CONFIG_SYS_HUSH_PARSER	/* Use the HUSH parser */
138 
139 #define CONFIG_AUTO_COMPLETE
140 #define CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size */
141 #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
142 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
143 
144 #define CONFIG_SYS_MEMTEST_START	0	/* memtest works on */
145 #define CONFIG_SYS_MEMTEST_END		0x10000
146 
147 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
148 
149 /*
150  * Physical Memory Map
151  */
152 #define CONFIG_NR_DRAM_BANKS	2
153 #define PHYS_SDRAM_1		CSD0_BASE_ADDR
154 #define PHYS_SDRAM_1_SIZE	(128 * 1024 * 1024)
155 #define PHYS_SDRAM_2		CSD1_BASE_ADDR
156 #define PHYS_SDRAM_2_SIZE	(128 * 1024 * 1024)
157 
158 #define CONFIG_SYS_SDRAM_BASE		CSD0_BASE_ADDR
159 #define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR + 0x10000)
160 #define CONFIG_SYS_INIT_RAM_SIZE		(IRAM_SIZE / 2)
161 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
162 					GENERATED_GBL_DATA_SIZE)
163 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
164 					CONFIG_SYS_GBL_DATA_OFFSET)
165 
166 /*
167  * MTD Command for mtdparts
168  */
169 #define CONFIG_CMD_MTDPARTS
170 #define CONFIG_MTD_DEVICE
171 #define CONFIG_FLASH_CFI_MTD
172 #define CONFIG_MTD_PARTITIONS
173 #define MTDIDS_DEFAULT		"nand0=mxc_nand,nor0=physmap-flash.0"
174 #define MTDPARTS_DEFAULT	"mtdparts=mxc_nand:1m(boot),5m(linux),"	\
175 				"96m(root),8m(cfg),1938m(user);"	\
176 				"physmap-flash.0:512k(b),4m(k),30m(u),28m(r)"
177 
178 /*
179  * FLASH and environment organization
180  */
181 #define CONFIG_SYS_FLASH_BASE		CS0_BASE_ADDR
182 #define CONFIG_SYS_MAX_FLASH_BANKS 1	/* max number of memory banks */
183 #define CONFIG_SYS_MAX_FLASH_SECT 512	/* max number of sectors on one chip */
184 /* Monitor at beginning of flash */
185 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
186 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
187 
188 #define CONFIG_ENV_SECT_SIZE	(128 * 1024)
189 #define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
190 
191 /* Address and size of Redundant Environment Sector	*/
192 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
193 #define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE
194 
195 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + \
196 				CONFIG_SYS_MONITOR_LEN)
197 
198 #define CONFIG_ENV_IS_IN_FLASH
199 
200 #if defined(CONFIG_FSL_ENV_IN_NAND)
201 	#define CONFIG_ENV_IS_IN_NAND
202 	#define CONFIG_ENV_OFFSET       (1024 * 1024)
203 #endif
204 
205 /*
206  * CFI FLASH driver setup
207  */
208 #define CONFIG_SYS_FLASH_CFI		/* Flash memory is CFI compliant */
209 #define CONFIG_FLASH_CFI_DRIVER
210 
211 /* A non-standard buffered write algorithm */
212 #define CONFIG_FLASH_SPANSION_S29WS_N
213 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/* faster */
214 #define CONFIG_SYS_FLASH_PROTECTION	/* Use hardware sector protection */
215 
216 /*
217  * NAND FLASH driver setup
218  */
219 #define CONFIG_NAND_MXC
220 #define CONFIG_MXC_NAND_REGS_BASE	(NFC_BASE_ADDR)
221 #define CONFIG_SYS_MAX_NAND_DEVICE	1
222 #define CONFIG_SYS_NAND_BASE		(NFC_BASE_ADDR)
223 #define CONFIG_MXC_NAND_HWECC
224 #define CONFIG_SYS_NAND_LARGEPAGE
225 
226 /* EHCI driver */
227 #define CONFIG_USB_EHCI
228 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	1
229 #define CONFIG_EHCI_IS_TDI
230 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
231 #define CONFIG_USB_EHCI_MXC
232 #define CONFIG_MXC_USB_PORT	0
233 #define CONFIG_MXC_USB_FLAGS	(MXC_EHCI_INTERFACE_DIFF_UNI | \
234 				 MXC_EHCI_POWER_PINS_ENABLED | \
235 				 MXC_EHCI_OC_PIN_ACTIVE_LOW)
236 #define CONFIG_MXC_USB_PORTSC	(MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI)
237 
238 /* mmc driver */
239 #define CONFIG_MMC
240 #define CONFIG_GENERIC_MMC
241 #define CONFIG_FSL_ESDHC
242 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
243 #define CONFIG_SYS_FSL_ESDHC_NUM	1
244 
245 /*
246  * Default environment and default scripts
247  * to update uboot and load kernel
248  */
249 
250 #define CONFIG_HOSTNAME "mx35pdk"
251 #define	CONFIG_EXTRA_ENV_SETTINGS					\
252 	"netdev=eth1\0"							\
253 	"ethprime=smc911x\0"						\
254 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
255 		"nfsroot=${serverip}:${rootpath}\0"			\
256 	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
257 	"addip_sta=setenv bootargs ${bootargs} "			\
258 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
259 		":${hostname}:${netdev}:off panic=1\0"			\
260 	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"		\
261 	"addip=if test -n ${ipdyn};then run addip_dyn;"			\
262 		"else run addip_sta;fi\0"				\
263 	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
264 	"addtty=setenv bootargs ${bootargs}"				\
265 		" console=ttymxc0,${baudrate}\0"			\
266 	"addmisc=setenv bootargs ${bootargs} ${misc}\0"			\
267 	"loadaddr=80800000\0"						\
268 	"kernel_addr_r=80800000\0"					\
269 	"hostname=" __stringify(CONFIG_HOSTNAME) "\0"			\
270 	"bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"		\
271 	"ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0"	\
272 	"flash_self=run ramargs addip addtty addmtd addmisc;"		\
273 		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
274 	"flash_nfs=run nfsargs addip addtty addmtd addmisc;"		\
275 		"bootm ${kernel_addr}\0"				\
276 	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
277 		"run nfsargs addip addtty addmtd addmisc;"		\
278 		"bootm ${kernel_addr_r}\0"				\
279 	"net_self_load=tftp ${kernel_addr_r} ${bootfile};"		\
280 		"tftp ${ramdisk_addr_r} ${ramdisk_file};\0"		\
281 	"u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0"		\
282 	"load=tftp ${loadaddr} ${u-boot}\0"				\
283 	"uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0"		\
284 	"update=protect off ${uboot_addr} +80000;"			\
285 		"erase ${uboot_addr} +80000;"				\
286 		"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0"		\
287 	"upd=if run load;then echo Updating u-boot;if run update;"	\
288 		"then echo U-Boot updated;"				\
289 			"else echo Error updating u-boot !;"		\
290 			"echo Board without bootloader !!;"		\
291 		"fi;"							\
292 		"else echo U-Boot not downloaded..exiting;fi\0"		\
293 	"bootcmd=run net_nfs\0"
294 
295 #endif				/* __CONFIG_H */
296