1eae4988bSStefano Babic /* 2eae4988bSStefano Babic * (C) Copyright 2010, Stefano Babic <sbabic@denx.de> 3eae4988bSStefano Babic * 4eae4988bSStefano Babic * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. 5eae4988bSStefano Babic * 6eae4988bSStefano Babic * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 7eae4988bSStefano Babic * 8eae4988bSStefano Babic * Configuration for the MX35pdk Freescale board. 9eae4988bSStefano Babic * 10eae4988bSStefano Babic * This program is free software; you can redistribute it and/or 11eae4988bSStefano Babic * modify it under the terms of the GNU General Public License as 12eae4988bSStefano Babic * published by the Free Software Foundation; either version 2 of 13eae4988bSStefano Babic * the License, or (at your option) any later version. 14eae4988bSStefano Babic * 15eae4988bSStefano Babic * This program is distributed in the hope that it will be useful, 16eae4988bSStefano Babic * but WITHOUT ANY WARRANTY; without even the implied warranty of 17eae4988bSStefano Babic * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18eae4988bSStefano Babic * GNU General Public License for more details. 19eae4988bSStefano Babic * 20eae4988bSStefano Babic * You should have received a copy of the GNU General Public License 21eae4988bSStefano Babic * along with this program; if not, write to the Free Software 22eae4988bSStefano Babic * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23eae4988bSStefano Babic * MA 02111-1307 USA 24eae4988bSStefano Babic */ 25eae4988bSStefano Babic 26eae4988bSStefano Babic #ifndef __CONFIG_H 27eae4988bSStefano Babic #define __CONFIG_H 28eae4988bSStefano Babic 29eae4988bSStefano Babic #include <asm/arch/imx-regs.h> 30eae4988bSStefano Babic 31eae4988bSStefano Babic /* High Level Configuration Options */ 32eae4988bSStefano Babic #define CONFIG_ARM1136 /* This is an arm1136 CPU core */ 33eae4988bSStefano Babic #define CONFIG_MX35 34eae4988bSStefano Babic 35eae4988bSStefano Babic #define CONFIG_DISPLAY_CPUINFO 36eae4988bSStefano Babic 37eae4988bSStefano Babic /* Set TEXT at the beginning of the NOR flash */ 38eae4988bSStefano Babic #define CONFIG_SYS_TEXT_BASE 0xA0000000 390792a36eSStefano Babic #define CONFIG_SYS_CACHELINE_SIZE 32 40eae4988bSStefano Babic 41eae4988bSStefano Babic #define CONFIG_BOARD_EARLY_INIT_F 429660e442SHelmut Raiger #define CONFIG_BOARD_LATE_INIT 43eae4988bSStefano Babic 44eae4988bSStefano Babic #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 45eae4988bSStefano Babic #define CONFIG_REVISION_TAG 46eae4988bSStefano Babic #define CONFIG_SETUP_MEMORY_TAGS 47eae4988bSStefano Babic #define CONFIG_INITRD_TAG 48eae4988bSStefano Babic 49eae4988bSStefano Babic /* 50eae4988bSStefano Babic * Size of malloc() pool 51eae4988bSStefano Babic */ 52eae4988bSStefano Babic #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) 53eae4988bSStefano Babic 54eae4988bSStefano Babic /* 55eae4988bSStefano Babic * Hardware drivers 56eae4988bSStefano Babic */ 57eae4988bSStefano Babic #define CONFIG_HARD_I2C 58eae4988bSStefano Babic #define CONFIG_I2C_MXC 59de6f604dSTroy Kisky #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR 60eae4988bSStefano Babic #define CONFIG_SYS_I2C_SPEED 100000 61eae4988bSStefano Babic #define CONFIG_MXC_SPI 62a4adedd4SStefano Babic #define CONFIG_MXC_GPIO 63eae4988bSStefano Babic 64eae4988bSStefano Babic 65eae4988bSStefano Babic /* 66eae4988bSStefano Babic * PMIC Configs 67eae4988bSStefano Babic */ 68*be3b51aaSŁukasz Majewski #define CONFIG_POWER 69*be3b51aaSŁukasz Majewski #define CONFIG_POWER_I2C 70*be3b51aaSŁukasz Majewski #define CONFIG_POWER_FSL 71eae4988bSStefano Babic #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08 72d28d6a96SFabio Estevam #define CONFIG_RTC_MC13XXX 73eae4988bSStefano Babic 74eae4988bSStefano Babic /* 75eae4988bSStefano Babic * MFD MC9SDZ60 76eae4988bSStefano Babic */ 77eae4988bSStefano Babic #define CONFIG_FSL_MC9SDZ60 78eae4988bSStefano Babic #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69 79eae4988bSStefano Babic 80eae4988bSStefano Babic /* 81eae4988bSStefano Babic * UART (console) 82eae4988bSStefano Babic */ 83eae4988bSStefano Babic #define CONFIG_MXC_UART 8440f6fffeSStefano Babic #define CONFIG_MXC_UART_BASE UART1_BASE 85eae4988bSStefano Babic 86eae4988bSStefano Babic /* allow to overwrite serial and ethaddr */ 87eae4988bSStefano Babic #define CONFIG_ENV_OVERWRITE 88eae4988bSStefano Babic #define CONFIG_CONS_INDEX 1 89eae4988bSStefano Babic #define CONFIG_BAUDRATE 115200 90eae4988bSStefano Babic 91eae4988bSStefano Babic /* 92eae4988bSStefano Babic * Command definition 93eae4988bSStefano Babic */ 94eae4988bSStefano Babic 95eae4988bSStefano Babic #include <config_cmd_default.h> 96eae4988bSStefano Babic 97eae4988bSStefano Babic #define CONFIG_CMD_PING 98eae4988bSStefano Babic #define CONFIG_CMD_DHCP 99eae4988bSStefano Babic #define CONFIG_BOOTP_SUBNETMASK 100eae4988bSStefano Babic #define CONFIG_BOOTP_GATEWAY 101eae4988bSStefano Babic #define CONFIG_BOOTP_DNS 102eae4988bSStefano Babic 103eae4988bSStefano Babic #define CONFIG_CMD_NAND 1040792a36eSStefano Babic #define CONFIG_CMD_CACHE 105eae4988bSStefano Babic 106eae4988bSStefano Babic #define CONFIG_CMD_I2C 107eae4988bSStefano Babic #define CONFIG_CMD_SPI 108eae4988bSStefano Babic #define CONFIG_CMD_MII 109eae4988bSStefano Babic #define CONFIG_CMD_NET 110eae4988bSStefano Babic #define CONFIG_NET_RETRY_COUNT 100 111d28d6a96SFabio Estevam #define CONFIG_CMD_DATE 112eae4988bSStefano Babic 1133292539eSStefano Babic #define CONFIG_CMD_MMC 1143292539eSStefano Babic #define CONFIG_DOS_PARTITION 1153292539eSStefano Babic #define CONFIG_EFI_PARTITION 1163292539eSStefano Babic #define CONFIG_CMD_EXT2 1173292539eSStefano Babic #define CONFIG_CMD_FAT 1183292539eSStefano Babic 119eae4988bSStefano Babic #define CONFIG_BOOTDELAY 3 120eae4988bSStefano Babic 121eae4988bSStefano Babic #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ 122eae4988bSStefano Babic 123eae4988bSStefano Babic /* 124eae4988bSStefano Babic * Ethernet on the debug board (SMC911) 125eae4988bSStefano Babic */ 126eae4988bSStefano Babic #define CONFIG_SMC911X 127eae4988bSStefano Babic #define CONFIG_SMC911X_16_BIT 1 128eae4988bSStefano Babic #define CONFIG_SMC911X_BASE CS5_BASE_ADDR 129eae4988bSStefano Babic 130eae4988bSStefano Babic #define CONFIG_HAS_ETH1 131eae4988bSStefano Babic #define CONFIG_ETHPRIME 132eae4988bSStefano Babic 133eae4988bSStefano Babic /* 134eae4988bSStefano Babic * Ethernet on SOC (FEC) 135eae4988bSStefano Babic */ 136eae4988bSStefano Babic #define CONFIG_FEC_MXC 137eae4988bSStefano Babic #define IMX_FEC_BASE FEC_BASE_ADDR 138eae4988bSStefano Babic #define CONFIG_FEC_MXC_PHYADDR 0x1F 139eae4988bSStefano Babic 140eae4988bSStefano Babic #define CONFIG_MII 141eae4988bSStefano Babic 142eae4988bSStefano Babic #define CONFIG_ARP_TIMEOUT 200UL 143eae4988bSStefano Babic 144eae4988bSStefano Babic /* 145eae4988bSStefano Babic * Miscellaneous configurable options 146eae4988bSStefano Babic */ 147eae4988bSStefano Babic #define CONFIG_SYS_LONGHELP /* undef to save memory */ 148eae4988bSStefano Babic #define CONFIG_SYS_PROMPT "MX35 U-Boot > " 149eae4988bSStefano Babic #define CONFIG_CMDLINE_EDITING 150eae4988bSStefano Babic #define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */ 151eae4988bSStefano Babic 152eae4988bSStefano Babic #define CONFIG_AUTO_COMPLETE 153eae4988bSStefano Babic #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 154eae4988bSStefano Babic /* Print Buffer Size */ 155eae4988bSStefano Babic #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 156eae4988bSStefano Babic #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 157eae4988bSStefano Babic #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 158eae4988bSStefano Babic 159eae4988bSStefano Babic #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 160eae4988bSStefano Babic #define CONFIG_SYS_MEMTEST_END 0x10000 161eae4988bSStefano Babic 162eae4988bSStefano Babic #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ 163eae4988bSStefano Babic 164eae4988bSStefano Babic #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 165eae4988bSStefano Babic 166eae4988bSStefano Babic #define CONFIG_SYS_HZ 1000 167eae4988bSStefano Babic 168eae4988bSStefano Babic /* 169eae4988bSStefano Babic * Physical Memory Map 170eae4988bSStefano Babic */ 1716b5acfc1SStefano Babic #define CONFIG_NR_DRAM_BANKS 2 172eae4988bSStefano Babic #define PHYS_SDRAM_1 CSD0_BASE_ADDR 173eae4988bSStefano Babic #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) 1746b5acfc1SStefano Babic #define PHYS_SDRAM_2 CSD1_BASE_ADDR 1756b5acfc1SStefano Babic #define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024) 176eae4988bSStefano Babic 177eae4988bSStefano Babic #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR 178eae4988bSStefano Babic #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000) 179eae4988bSStefano Babic #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2) 180eae4988bSStefano Babic #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 181eae4988bSStefano Babic GENERATED_GBL_DATA_SIZE) 182eae4988bSStefano Babic #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 183eae4988bSStefano Babic CONFIG_SYS_GBL_DATA_OFFSET) 184eae4988bSStefano Babic 185eae4988bSStefano Babic /* 186eae4988bSStefano Babic * MTD Command for mtdparts 187eae4988bSStefano Babic */ 188eae4988bSStefano Babic #define CONFIG_CMD_MTDPARTS 189eae4988bSStefano Babic #define CONFIG_MTD_DEVICE 190eae4988bSStefano Babic #define CONFIG_FLASH_CFI_MTD 191eae4988bSStefano Babic #define CONFIG_MTD_PARTITIONS 192eae4988bSStefano Babic #define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0" 193eae4988bSStefano Babic #define MTDPARTS_DEFAULT "mtdparts=mxc_nand:1m(boot),5m(linux)," \ 194eae4988bSStefano Babic "96m(root),8m(cfg),1938m(user);" \ 195eae4988bSStefano Babic "physmap-flash.0:512k(b),4m(k),30m(u),28m(r)" 196eae4988bSStefano Babic 197eae4988bSStefano Babic /* 198eae4988bSStefano Babic * FLASH and environment organization 199eae4988bSStefano Babic */ 200eae4988bSStefano Babic #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR 201eae4988bSStefano Babic #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 202eae4988bSStefano Babic #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ 203eae4988bSStefano Babic /* Monitor at beginning of flash */ 204eae4988bSStefano Babic #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 205eae4988bSStefano Babic #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 206eae4988bSStefano Babic 207eae4988bSStefano Babic #define CONFIG_ENV_SECT_SIZE (128 * 1024) 208eae4988bSStefano Babic #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 209eae4988bSStefano Babic 210eae4988bSStefano Babic /* Address and size of Redundant Environment Sector */ 211eae4988bSStefano Babic #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 212eae4988bSStefano Babic #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 213eae4988bSStefano Babic 214eae4988bSStefano Babic #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ 215eae4988bSStefano Babic CONFIG_SYS_MONITOR_LEN) 216eae4988bSStefano Babic 217eae4988bSStefano Babic #define CONFIG_ENV_IS_IN_FLASH 218eae4988bSStefano Babic 219eae4988bSStefano Babic #if defined(CONFIG_FSL_ENV_IN_NAND) 220eae4988bSStefano Babic #define CONFIG_ENV_IS_IN_NAND 221eae4988bSStefano Babic #define CONFIG_ENV_OFFSET (1024 * 1024) 222eae4988bSStefano Babic #endif 223eae4988bSStefano Babic 224eae4988bSStefano Babic /* 225eae4988bSStefano Babic * CFI FLASH driver setup 226eae4988bSStefano Babic */ 227eae4988bSStefano Babic #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 228eae4988bSStefano Babic #define CONFIG_FLASH_CFI_DRIVER 229eae4988bSStefano Babic 230eae4988bSStefano Babic /* A non-standard buffered write algorithm */ 231eae4988bSStefano Babic #define CONFIG_FLASH_SPANSION_S29WS_N 232eae4988bSStefano Babic #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ 233eae4988bSStefano Babic #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ 234eae4988bSStefano Babic 235eae4988bSStefano Babic /* 236eae4988bSStefano Babic * NAND FLASH driver setup 237eae4988bSStefano Babic */ 238eae4988bSStefano Babic #define CONFIG_NAND_MXC 239eae4988bSStefano Babic #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR) 240eae4988bSStefano Babic #define CONFIG_SYS_MAX_NAND_DEVICE 1 241eae4988bSStefano Babic #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR) 242eae4988bSStefano Babic #define CONFIG_MXC_NAND_HWECC 243eae4988bSStefano Babic #define CONFIG_SYS_NAND_LARGEPAGE 244eae4988bSStefano Babic 2453292539eSStefano Babic /* mmc driver */ 2463292539eSStefano Babic #define CONFIG_MMC 2473292539eSStefano Babic #define CONFIG_GENERIC_MMC 2483292539eSStefano Babic #define CONFIG_FSL_ESDHC 2493292539eSStefano Babic #define CONFIG_SYS_FSL_ESDHC_ADDR 0 2503292539eSStefano Babic #define CONFIG_SYS_FSL_ESDHC_NUM 1 2513292539eSStefano Babic 252eae4988bSStefano Babic /* 253eae4988bSStefano Babic * Default environment and default scripts 254eae4988bSStefano Babic * to update uboot and load kernel 255eae4988bSStefano Babic */ 256eae4988bSStefano Babic 257eae4988bSStefano Babic #define CONFIG_HOSTNAME "mx35pdk" 258eae4988bSStefano Babic #define CONFIG_EXTRA_ENV_SETTINGS \ 259eae4988bSStefano Babic "netdev=eth1\0" \ 260eae4988bSStefano Babic "ethprime=smc911x\0" \ 261eae4988bSStefano Babic "nfsargs=setenv bootargs root=/dev/nfs rw " \ 262eae4988bSStefano Babic "nfsroot=${serverip}:${rootpath}\0" \ 263eae4988bSStefano Babic "ramargs=setenv bootargs root=/dev/ram rw\0" \ 264eae4988bSStefano Babic "addip_sta=setenv bootargs ${bootargs} " \ 265eae4988bSStefano Babic "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 266eae4988bSStefano Babic ":${hostname}:${netdev}:off panic=1\0" \ 267eae4988bSStefano Babic "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 268eae4988bSStefano Babic "addip=if test -n ${ipdyn};then run addip_dyn;" \ 269eae4988bSStefano Babic "else run addip_sta;fi\0" \ 270eae4988bSStefano Babic "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 271eae4988bSStefano Babic "addtty=setenv bootargs ${bootargs}" \ 272eae4988bSStefano Babic " console=ttymxc0,${baudrate}\0" \ 273eae4988bSStefano Babic "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 274eae4988bSStefano Babic "loadaddr=80800000\0" \ 275eae4988bSStefano Babic "kernel_addr_r=80800000\0" \ 27693ea89f0SMarek Vasut "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 27793ea89f0SMarek Vasut "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 27893ea89f0SMarek Vasut "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \ 279eae4988bSStefano Babic "flash_self=run ramargs addip addtty addmtd addmisc;" \ 280eae4988bSStefano Babic "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 281eae4988bSStefano Babic "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 282eae4988bSStefano Babic "bootm ${kernel_addr}\0" \ 283eae4988bSStefano Babic "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 284eae4988bSStefano Babic "run nfsargs addip addtty addmtd addmisc;" \ 285eae4988bSStefano Babic "bootm ${kernel_addr_r}\0" \ 286eae4988bSStefano Babic "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \ 287eae4988bSStefano Babic "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \ 28893ea89f0SMarek Vasut "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \ 289eae4988bSStefano Babic "load=tftp ${loadaddr} ${u-boot}\0" \ 29093ea89f0SMarek Vasut "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \ 2913292539eSStefano Babic "update=protect off ${uboot_addr} +80000;" \ 2923292539eSStefano Babic "erase ${uboot_addr} +80000;" \ 293eae4988bSStefano Babic "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \ 294eae4988bSStefano Babic "upd=if run load;then echo Updating u-boot;if run update;" \ 295eae4988bSStefano Babic "then echo U-Boot updated;" \ 296eae4988bSStefano Babic "else echo Error updating u-boot !;" \ 297eae4988bSStefano Babic "echo Board without bootloader !!;" \ 298eae4988bSStefano Babic "fi;" \ 299eae4988bSStefano Babic "else echo U-Boot not downloaded..exiting;fi\0" \ 300eae4988bSStefano Babic "bootcmd=run net_nfs\0" 301eae4988bSStefano Babic 302eae4988bSStefano Babic #endif /* __CONFIG_H */ 303