1eae4988bSStefano Babic /* 2eae4988bSStefano Babic * (C) Copyright 2010, Stefano Babic <sbabic@denx.de> 3eae4988bSStefano Babic * 4eae4988bSStefano Babic * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. 5eae4988bSStefano Babic * 6eae4988bSStefano Babic * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 7eae4988bSStefano Babic * 8eae4988bSStefano Babic * Configuration for the MX35pdk Freescale board. 9eae4988bSStefano Babic * 101a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 11eae4988bSStefano Babic */ 12eae4988bSStefano Babic 13eae4988bSStefano Babic #ifndef __CONFIG_H 14eae4988bSStefano Babic #define __CONFIG_H 15eae4988bSStefano Babic 16eae4988bSStefano Babic #include <asm/arch/imx-regs.h> 17eae4988bSStefano Babic 18eae4988bSStefano Babic /* High Level Configuration Options */ 19eae4988bSStefano Babic #define CONFIG_ARM1136 /* This is an arm1136 CPU core */ 20eae4988bSStefano Babic #define CONFIG_MX35 21eae4988bSStefano Babic 22eae4988bSStefano Babic #define CONFIG_DISPLAY_CPUINFO 23eae4988bSStefano Babic 24eae4988bSStefano Babic /* Set TEXT at the beginning of the NOR flash */ 25eae4988bSStefano Babic #define CONFIG_SYS_TEXT_BASE 0xA0000000 26eae4988bSStefano Babic 27eae4988bSStefano Babic #define CONFIG_BOARD_EARLY_INIT_F 289660e442SHelmut Raiger #define CONFIG_BOARD_LATE_INIT 29eae4988bSStefano Babic 30eae4988bSStefano Babic #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 31eae4988bSStefano Babic #define CONFIG_REVISION_TAG 32eae4988bSStefano Babic #define CONFIG_SETUP_MEMORY_TAGS 33eae4988bSStefano Babic #define CONFIG_INITRD_TAG 34eae4988bSStefano Babic 35eae4988bSStefano Babic /* 36eae4988bSStefano Babic * Size of malloc() pool 37eae4988bSStefano Babic */ 38eae4988bSStefano Babic #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) 39eae4988bSStefano Babic 40eae4988bSStefano Babic /* 41eae4988bSStefano Babic * Hardware drivers 42eae4988bSStefano Babic */ 43*b089d039Strem #define CONFIG_SYS_I2C 44*b089d039Strem #define CONFIG_SYS_I2C_MXC 45*b089d039Strem #define CONFIG_SYS_SPD_BUS_NUM 0 /* I2C1 */ 46eae4988bSStefano Babic #define CONFIG_MXC_SPI 47a4adedd4SStefano Babic #define CONFIG_MXC_GPIO 48eae4988bSStefano Babic 49eae4988bSStefano Babic 50eae4988bSStefano Babic /* 51eae4988bSStefano Babic * PMIC Configs 52eae4988bSStefano Babic */ 53be3b51aaSŁukasz Majewski #define CONFIG_POWER 54be3b51aaSŁukasz Majewski #define CONFIG_POWER_I2C 55be3b51aaSŁukasz Majewski #define CONFIG_POWER_FSL 564cfc6c4fSFabio Estevam #define CONFIG_PMIC_FSL_MC13892 57eae4988bSStefano Babic #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08 58d28d6a96SFabio Estevam #define CONFIG_RTC_MC13XXX 59eae4988bSStefano Babic 60eae4988bSStefano Babic /* 61eae4988bSStefano Babic * MFD MC9SDZ60 62eae4988bSStefano Babic */ 63eae4988bSStefano Babic #define CONFIG_FSL_MC9SDZ60 64eae4988bSStefano Babic #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69 65eae4988bSStefano Babic 66eae4988bSStefano Babic /* 67eae4988bSStefano Babic * UART (console) 68eae4988bSStefano Babic */ 69eae4988bSStefano Babic #define CONFIG_MXC_UART 7040f6fffeSStefano Babic #define CONFIG_MXC_UART_BASE UART1_BASE 71eae4988bSStefano Babic 72eae4988bSStefano Babic /* allow to overwrite serial and ethaddr */ 73eae4988bSStefano Babic #define CONFIG_ENV_OVERWRITE 74eae4988bSStefano Babic #define CONFIG_CONS_INDEX 1 75eae4988bSStefano Babic #define CONFIG_BAUDRATE 115200 76eae4988bSStefano Babic 77eae4988bSStefano Babic /* 78eae4988bSStefano Babic * Command definition 79eae4988bSStefano Babic */ 80eae4988bSStefano Babic 81eae4988bSStefano Babic #include <config_cmd_default.h> 82eae4988bSStefano Babic 838dd15b43SFabio Estevam #define CONFIG_OF_LIBFDT 84ee303c96SFabio Estevam #define CONFIG_CMD_BOOTZ 85eae4988bSStefano Babic #define CONFIG_CMD_PING 86eae4988bSStefano Babic #define CONFIG_CMD_DHCP 87eae4988bSStefano Babic #define CONFIG_BOOTP_SUBNETMASK 88eae4988bSStefano Babic #define CONFIG_BOOTP_GATEWAY 89eae4988bSStefano Babic #define CONFIG_BOOTP_DNS 90eae4988bSStefano Babic 91eae4988bSStefano Babic #define CONFIG_CMD_NAND 920792a36eSStefano Babic #define CONFIG_CMD_CACHE 93eae4988bSStefano Babic 94eae4988bSStefano Babic #define CONFIG_CMD_I2C 95eae4988bSStefano Babic #define CONFIG_CMD_SPI 96eae4988bSStefano Babic #define CONFIG_CMD_MII 97eae4988bSStefano Babic #define CONFIG_CMD_NET 98eae4988bSStefano Babic #define CONFIG_NET_RETRY_COUNT 100 99d28d6a96SFabio Estevam #define CONFIG_CMD_DATE 100eae4988bSStefano Babic 101961a7628SBenoît Thébaudeau #define CONFIG_CMD_USB 102961a7628SBenoît Thébaudeau #define CONFIG_USB_STORAGE 1033292539eSStefano Babic #define CONFIG_CMD_MMC 1043292539eSStefano Babic #define CONFIG_DOS_PARTITION 1053292539eSStefano Babic #define CONFIG_EFI_PARTITION 1063292539eSStefano Babic #define CONFIG_CMD_EXT2 1073292539eSStefano Babic #define CONFIG_CMD_FAT 1083292539eSStefano Babic 109ec7503bbSFabio Estevam #define CONFIG_BOOTDELAY 1 110eae4988bSStefano Babic 111eae4988bSStefano Babic #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ 112eae4988bSStefano Babic 113eae4988bSStefano Babic /* 114eae4988bSStefano Babic * Ethernet on the debug board (SMC911) 115eae4988bSStefano Babic */ 116eae4988bSStefano Babic #define CONFIG_SMC911X 117eae4988bSStefano Babic #define CONFIG_SMC911X_16_BIT 1 118eae4988bSStefano Babic #define CONFIG_SMC911X_BASE CS5_BASE_ADDR 119eae4988bSStefano Babic 120eae4988bSStefano Babic #define CONFIG_HAS_ETH1 121eae4988bSStefano Babic #define CONFIG_ETHPRIME 122eae4988bSStefano Babic 123eae4988bSStefano Babic /* 124eae4988bSStefano Babic * Ethernet on SOC (FEC) 125eae4988bSStefano Babic */ 126eae4988bSStefano Babic #define CONFIG_FEC_MXC 127eae4988bSStefano Babic #define IMX_FEC_BASE FEC_BASE_ADDR 128eae4988bSStefano Babic #define CONFIG_FEC_MXC_PHYADDR 0x1F 129eae4988bSStefano Babic 130eae4988bSStefano Babic #define CONFIG_MII 131eae4988bSStefano Babic 132eae4988bSStefano Babic #define CONFIG_ARP_TIMEOUT 200UL 133eae4988bSStefano Babic 134eae4988bSStefano Babic /* 135eae4988bSStefano Babic * Miscellaneous configurable options 136eae4988bSStefano Babic */ 137eae4988bSStefano Babic #define CONFIG_SYS_LONGHELP /* undef to save memory */ 138eae4988bSStefano Babic #define CONFIG_SYS_PROMPT "MX35 U-Boot > " 139eae4988bSStefano Babic #define CONFIG_CMDLINE_EDITING 140eae4988bSStefano Babic #define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */ 141eae4988bSStefano Babic 142eae4988bSStefano Babic #define CONFIG_AUTO_COMPLETE 143eae4988bSStefano Babic #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 144eae4988bSStefano Babic /* Print Buffer Size */ 145eae4988bSStefano Babic #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 146eae4988bSStefano Babic #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 147eae4988bSStefano Babic #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 148eae4988bSStefano Babic 149eae4988bSStefano Babic #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 150eae4988bSStefano Babic #define CONFIG_SYS_MEMTEST_END 0x10000 151eae4988bSStefano Babic 152eae4988bSStefano Babic #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ 153eae4988bSStefano Babic 154eae4988bSStefano Babic #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 155eae4988bSStefano Babic 156eae4988bSStefano Babic #define CONFIG_SYS_HZ 1000 157eae4988bSStefano Babic 158eae4988bSStefano Babic /* 159eae4988bSStefano Babic * Physical Memory Map 160eae4988bSStefano Babic */ 1616b5acfc1SStefano Babic #define CONFIG_NR_DRAM_BANKS 2 162eae4988bSStefano Babic #define PHYS_SDRAM_1 CSD0_BASE_ADDR 163eae4988bSStefano Babic #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) 1646b5acfc1SStefano Babic #define PHYS_SDRAM_2 CSD1_BASE_ADDR 1656b5acfc1SStefano Babic #define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024) 166eae4988bSStefano Babic 167eae4988bSStefano Babic #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR 168eae4988bSStefano Babic #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000) 169eae4988bSStefano Babic #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2) 170eae4988bSStefano Babic #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 171eae4988bSStefano Babic GENERATED_GBL_DATA_SIZE) 172eae4988bSStefano Babic #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 173eae4988bSStefano Babic CONFIG_SYS_GBL_DATA_OFFSET) 174eae4988bSStefano Babic 175eae4988bSStefano Babic /* 176eae4988bSStefano Babic * MTD Command for mtdparts 177eae4988bSStefano Babic */ 178eae4988bSStefano Babic #define CONFIG_CMD_MTDPARTS 179eae4988bSStefano Babic #define CONFIG_MTD_DEVICE 180eae4988bSStefano Babic #define CONFIG_FLASH_CFI_MTD 181eae4988bSStefano Babic #define CONFIG_MTD_PARTITIONS 182eae4988bSStefano Babic #define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0" 183eae4988bSStefano Babic #define MTDPARTS_DEFAULT "mtdparts=mxc_nand:1m(boot),5m(linux)," \ 184eae4988bSStefano Babic "96m(root),8m(cfg),1938m(user);" \ 185eae4988bSStefano Babic "physmap-flash.0:512k(b),4m(k),30m(u),28m(r)" 186eae4988bSStefano Babic 187eae4988bSStefano Babic /* 188eae4988bSStefano Babic * FLASH and environment organization 189eae4988bSStefano Babic */ 190eae4988bSStefano Babic #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR 191eae4988bSStefano Babic #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 192eae4988bSStefano Babic #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ 193eae4988bSStefano Babic /* Monitor at beginning of flash */ 194eae4988bSStefano Babic #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 195eae4988bSStefano Babic #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 196eae4988bSStefano Babic 197eae4988bSStefano Babic #define CONFIG_ENV_SECT_SIZE (128 * 1024) 198eae4988bSStefano Babic #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 199eae4988bSStefano Babic 200eae4988bSStefano Babic /* Address and size of Redundant Environment Sector */ 201eae4988bSStefano Babic #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 202eae4988bSStefano Babic #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 203eae4988bSStefano Babic 204eae4988bSStefano Babic #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ 205eae4988bSStefano Babic CONFIG_SYS_MONITOR_LEN) 206eae4988bSStefano Babic 207eae4988bSStefano Babic #define CONFIG_ENV_IS_IN_FLASH 208eae4988bSStefano Babic 209eae4988bSStefano Babic #if defined(CONFIG_FSL_ENV_IN_NAND) 210eae4988bSStefano Babic #define CONFIG_ENV_IS_IN_NAND 211eae4988bSStefano Babic #define CONFIG_ENV_OFFSET (1024 * 1024) 212eae4988bSStefano Babic #endif 213eae4988bSStefano Babic 214eae4988bSStefano Babic /* 215eae4988bSStefano Babic * CFI FLASH driver setup 216eae4988bSStefano Babic */ 217eae4988bSStefano Babic #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 218eae4988bSStefano Babic #define CONFIG_FLASH_CFI_DRIVER 219eae4988bSStefano Babic 220eae4988bSStefano Babic /* A non-standard buffered write algorithm */ 221eae4988bSStefano Babic #define CONFIG_FLASH_SPANSION_S29WS_N 222eae4988bSStefano Babic #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ 223eae4988bSStefano Babic #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ 224eae4988bSStefano Babic 225eae4988bSStefano Babic /* 226eae4988bSStefano Babic * NAND FLASH driver setup 227eae4988bSStefano Babic */ 228eae4988bSStefano Babic #define CONFIG_NAND_MXC 229eae4988bSStefano Babic #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR) 230eae4988bSStefano Babic #define CONFIG_SYS_MAX_NAND_DEVICE 1 231eae4988bSStefano Babic #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR) 232eae4988bSStefano Babic #define CONFIG_MXC_NAND_HWECC 233eae4988bSStefano Babic #define CONFIG_SYS_NAND_LARGEPAGE 234eae4988bSStefano Babic 235961a7628SBenoît Thébaudeau /* EHCI driver */ 236961a7628SBenoît Thébaudeau #define CONFIG_USB_EHCI 237961a7628SBenoît Thébaudeau #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 238961a7628SBenoît Thébaudeau #define CONFIG_EHCI_IS_TDI 239961a7628SBenoît Thébaudeau #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 240961a7628SBenoît Thébaudeau #define CONFIG_USB_EHCI_MXC 241961a7628SBenoît Thébaudeau #define CONFIG_MXC_USB_PORT 0 242961a7628SBenoît Thébaudeau #define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERFACE_DIFF_UNI | \ 243961a7628SBenoît Thébaudeau MXC_EHCI_POWER_PINS_ENABLED | \ 244961a7628SBenoît Thébaudeau MXC_EHCI_OC_PIN_ACTIVE_LOW) 245961a7628SBenoît Thébaudeau #define CONFIG_MXC_USB_PORTSC (MXC_EHCI_UTMI_16BIT | MXC_EHCI_MODE_UTMI) 246961a7628SBenoît Thébaudeau 2473292539eSStefano Babic /* mmc driver */ 2483292539eSStefano Babic #define CONFIG_MMC 2493292539eSStefano Babic #define CONFIG_GENERIC_MMC 2503292539eSStefano Babic #define CONFIG_FSL_ESDHC 2513292539eSStefano Babic #define CONFIG_SYS_FSL_ESDHC_ADDR 0 2523292539eSStefano Babic #define CONFIG_SYS_FSL_ESDHC_NUM 1 2533292539eSStefano Babic 254eae4988bSStefano Babic /* 255eae4988bSStefano Babic * Default environment and default scripts 256eae4988bSStefano Babic * to update uboot and load kernel 257eae4988bSStefano Babic */ 258eae4988bSStefano Babic 259eae4988bSStefano Babic #define CONFIG_HOSTNAME "mx35pdk" 260eae4988bSStefano Babic #define CONFIG_EXTRA_ENV_SETTINGS \ 261eae4988bSStefano Babic "netdev=eth1\0" \ 262eae4988bSStefano Babic "ethprime=smc911x\0" \ 263eae4988bSStefano Babic "nfsargs=setenv bootargs root=/dev/nfs rw " \ 264eae4988bSStefano Babic "nfsroot=${serverip}:${rootpath}\0" \ 265eae4988bSStefano Babic "ramargs=setenv bootargs root=/dev/ram rw\0" \ 266eae4988bSStefano Babic "addip_sta=setenv bootargs ${bootargs} " \ 267eae4988bSStefano Babic "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 268eae4988bSStefano Babic ":${hostname}:${netdev}:off panic=1\0" \ 269eae4988bSStefano Babic "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 270eae4988bSStefano Babic "addip=if test -n ${ipdyn};then run addip_dyn;" \ 271eae4988bSStefano Babic "else run addip_sta;fi\0" \ 272eae4988bSStefano Babic "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 273eae4988bSStefano Babic "addtty=setenv bootargs ${bootargs}" \ 274eae4988bSStefano Babic " console=ttymxc0,${baudrate}\0" \ 275eae4988bSStefano Babic "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 276eae4988bSStefano Babic "loadaddr=80800000\0" \ 277eae4988bSStefano Babic "kernel_addr_r=80800000\0" \ 27893ea89f0SMarek Vasut "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 27993ea89f0SMarek Vasut "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 28093ea89f0SMarek Vasut "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \ 281eae4988bSStefano Babic "flash_self=run ramargs addip addtty addmtd addmisc;" \ 282eae4988bSStefano Babic "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 283eae4988bSStefano Babic "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 284eae4988bSStefano Babic "bootm ${kernel_addr}\0" \ 285eae4988bSStefano Babic "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 286eae4988bSStefano Babic "run nfsargs addip addtty addmtd addmisc;" \ 287eae4988bSStefano Babic "bootm ${kernel_addr_r}\0" \ 288eae4988bSStefano Babic "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \ 289eae4988bSStefano Babic "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \ 29093ea89f0SMarek Vasut "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \ 291eae4988bSStefano Babic "load=tftp ${loadaddr} ${u-boot}\0" \ 29293ea89f0SMarek Vasut "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \ 2933292539eSStefano Babic "update=protect off ${uboot_addr} +80000;" \ 2943292539eSStefano Babic "erase ${uboot_addr} +80000;" \ 295eae4988bSStefano Babic "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \ 296eae4988bSStefano Babic "upd=if run load;then echo Updating u-boot;if run update;" \ 297eae4988bSStefano Babic "then echo U-Boot updated;" \ 298eae4988bSStefano Babic "else echo Error updating u-boot !;" \ 299eae4988bSStefano Babic "echo Board without bootloader !!;" \ 300eae4988bSStefano Babic "fi;" \ 301eae4988bSStefano Babic "else echo U-Boot not downloaded..exiting;fi\0" \ 302eae4988bSStefano Babic "bootcmd=run net_nfs\0" 303eae4988bSStefano Babic 304eae4988bSStefano Babic #endif /* __CONFIG_H */ 305