1 /* 2 * (C) Copyright 2011 Freescale Semiconductor, Inc. 3 * Author: Fabio Estevam <fabio.estevam@freescale.com> 4 * 5 * Based on m28evk.h: 6 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> 7 * on behalf of DENX Software Engineering GmbH 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 */ 19 #ifndef __MX28EVK_CONFIG_H__ 20 #define __MX28EVK_CONFIG_H__ 21 22 #include <asm/arch/regs-base.h> 23 24 /* 25 * SoC configurations 26 */ 27 #define CONFIG_MX28 /* i.MX28 SoC */ 28 #define CONFIG_MXS_GPIO /* GPIO control */ 29 #define CONFIG_SYS_HZ 1000 /* Ticks per second */ 30 31 #define CONFIG_MACH_TYPE MACH_TYPE_MX28EVK 32 33 #define CONFIG_SYS_NO_FLASH 34 #define CONFIG_SYS_ICACHE_OFF 35 #define CONFIG_SYS_DCACHE_OFF 36 #define CONFIG_BOARD_EARLY_INIT_F 37 #define CONFIG_ARCH_MISC_INIT 38 39 /* 40 * SPL 41 */ 42 #define CONFIG_SPL 43 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE 44 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mx28" 45 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds" 46 #define CONFIG_SPL_LIBCOMMON_SUPPORT 47 #define CONFIG_SPL_LIBGENERIC_SUPPORT 48 #define CONFIG_SPL_GPIO_SUPPORT 49 50 /* 51 * U-Boot Commands 52 */ 53 #include <config_cmd_default.h> 54 #define CONFIG_DISPLAY_CPUINFO 55 #define CONFIG_DOS_PARTITION 56 57 #define CONFIG_CMD_CACHE 58 #define CONFIG_CMD_DATE 59 #define CONFIG_CMD_DHCP 60 #define CONFIG_CMD_FAT 61 #define CONFIG_CMD_GPIO 62 #define CONFIG_CMD_MII 63 #define CONFIG_CMD_MMC 64 #define CONFIG_CMD_NET 65 #define CONFIG_CMD_NFS 66 #define CONFIG_CMD_PING 67 #define CONFIG_CMD_SF 68 #define CONFIG_CMD_SPI 69 #define CONFIG_CMD_USB 70 #define CONFIG_CMD_BOOTZ 71 72 /* 73 * Memory configurations 74 */ 75 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ 76 #define PHYS_SDRAM_1 0x40000000 /* Base address */ 77 #define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */ 78 #define CONFIG_STACKSIZE (128 * 1024) /* 128 KB stack */ 79 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ 80 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ 81 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ 82 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 83 /* Point initial SP in SRAM so SPL can use it too. */ 84 85 #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 86 #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) 87 88 #define CONFIG_SYS_INIT_SP_OFFSET \ 89 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 90 #define CONFIG_SYS_INIT_SP_ADDR \ 91 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 92 93 /* 94 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some 95 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot 96 * binary. In case there was more of this mess, 0x100 bytes are skipped. 97 */ 98 #define CONFIG_SYS_TEXT_BASE 0x40000100 99 100 #define CONFIG_ENV_OVERWRITE 101 /* 102 * U-Boot general configurations 103 */ 104 #define CONFIG_SYS_LONGHELP 105 #define CONFIG_SYS_PROMPT "MX28EVK U-Boot > " 106 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 107 #define CONFIG_SYS_PBSIZE \ 108 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 109 /* Print buffer size */ 110 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 111 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 112 /* Boot argument buffer size */ 113 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */ 114 #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 115 #define CONFIG_CMDLINE_EDITING /* Command history etc */ 116 #define CONFIG_SYS_HUSH_PARSER 117 118 /* 119 * Serial Driver 120 */ 121 #define CONFIG_PL011_SERIAL 122 #define CONFIG_PL011_CLOCK 24000000 123 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } 124 #define CONFIG_CONS_INDEX 0 125 #define CONFIG_BAUDRATE 115200 /* Default baud rate */ 126 127 /* 128 * DMA 129 */ 130 #define CONFIG_APBH_DMA 131 132 /* 133 * MMC Driver 134 */ 135 #define CONFIG_ENV_IS_IN_MMC 136 #ifdef CONFIG_ENV_IS_IN_MMC 137 #define CONFIG_ENV_OFFSET (256 * 1024) 138 #define CONFIG_ENV_SIZE (16 * 1024) 139 #define CONFIG_SYS_MMC_ENV_DEV 0 140 #endif 141 #define CONFIG_CMD_SAVEENV 142 #ifdef CONFIG_CMD_MMC 143 #define CONFIG_MMC 144 #define CONFIG_GENERIC_MMC 145 #define CONFIG_MMC_BOUNCE_BUFFER 146 #define CONFIG_MXS_MMC 147 #endif 148 149 /* 150 * NAND Driver 151 */ 152 #ifdef CONFIG_CMD_NAND 153 #define CONFIG_NAND_MXS 154 #define CONFIG_SYS_MAX_NAND_DEVICE 1 155 #define CONFIG_SYS_NAND_BASE 0x60000000 156 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 157 #endif 158 159 /* 160 * Ethernet on SOC (FEC) 161 */ 162 #ifdef CONFIG_CMD_NET 163 #define CONFIG_NET_MULTI 164 #define CONFIG_ETHPRIME "FEC0" 165 #define CONFIG_FEC_MXC 166 #define CONFIG_FEC_MXC_MULTI 167 #define CONFIG_MII 168 #define CONFIG_DISCOVER_PHY 169 #define CONFIG_FEC_XCV_TYPE RMII 170 #define CONFIG_MX28_FEC_MAC_IN_OCOTP 171 #endif 172 173 /* 174 * RTC 175 */ 176 #ifdef CONFIG_CMD_DATE 177 #define CONFIG_RTC_MXS 178 #endif 179 180 /* 181 * USB 182 */ 183 #ifdef CONFIG_CMD_USB 184 #define CONFIG_USB_EHCI 185 #define CONFIG_USB_EHCI_MXS 186 #define CONFIG_EHCI_MXS_PORT 1 187 #define CONFIG_EHCI_IS_TDI 188 #define CONFIG_USB_STORAGE 189 #endif 190 191 /* 192 * SPI 193 */ 194 #ifdef CONFIG_CMD_SPI 195 #define CONFIG_HARD_SPI 196 #define CONFIG_MXS_SPI 197 #define CONFIG_SPI_HALF_DUPLEX 198 #define CONFIG_DEFAULT_SPI_BUS 2 199 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 200 201 /* SPI Flash */ 202 #ifdef CONFIG_CMD_SF 203 #define CONFIG_SPI_FLASH 204 #define CONFIG_SF_DEFAULT_BUS 2 205 #define CONFIG_SF_DEFAULT_CS 0 206 /* this may vary and depends on the installed chip */ 207 #define CONFIG_SPI_FLASH_SST 208 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 209 #define CONFIG_SF_DEFAULT_SPEED 24000000 210 211 /* (redundant) environemnt in SPI flash */ 212 #undef CONFIG_ENV_IS_IN_SPI_FLASH 213 #ifdef CONFIG_ENV_IS_IN_SPI_FLASH 214 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 215 #define CONFIG_ENV_SIZE 0x1000 /* 4KB */ 216 #define CONFIG_ENV_OFFSET 0x40000 /* 256K */ 217 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 218 #define CONFIG_ENV_SECT_SIZE 0x1000 219 #define CONFIG_ENV_SPI_CS 0 220 #define CONFIG_ENV_SPI_BUS 2 221 #define CONFIG_ENV_SPI_MAX_HZ 24000000 222 #define CONFIG_ENV_SPI_MODE SPI_MODE_0 223 #endif 224 #endif 225 #endif 226 227 /* 228 * Boot Linux 229 */ 230 #define CONFIG_CMDLINE_TAG 231 #define CONFIG_SETUP_MEMORY_TAGS 232 #define CONFIG_BOOTDELAY 3 233 #define CONFIG_BOOTFILE "uImage" 234 #define CONFIG_BOOTCOMMAND "run bootcmd_net" 235 #define CONFIG_LOADADDR 0x42000000 236 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 237 #define CONFIG_OF_LIBFDT 238 239 /* 240 * Extra Environments 241 */ 242 #define CONFIG_EXTRA_ENV_SETTINGS \ 243 "console_fsl=console=ttyAM0" \ 244 "console_mainline=console=ttyAMA0" \ 245 "netargs=setenv bootargs console=${console_mainline}" \ 246 "root=/dev/nfs " \ 247 "ip=dhcp nfsroot=${serverip}:${nfsroot}\0" \ 248 "bootcmd_net=echo Booting from net ...; " \ 249 "run netargs; " \ 250 "dhcp ${uimage}; bootm\0" \ 251 252 #endif /* __MX28EVK_CONFIG_H__ */ 253