1 /* 2 * (C) Copyright 2011 Freescale Semiconductor, Inc. 3 * Author: Fabio Estevam <fabio.estevam@freescale.com> 4 * 5 * Based on m28evk.h: 6 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> 7 * on behalf of DENX Software Engineering GmbH 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 */ 19 #ifndef __MX28EVK_CONFIG_H__ 20 #define __MX28EVK_CONFIG_H__ 21 22 #include <asm/arch/regs-base.h> 23 24 /* 25 * SoC configurations 26 */ 27 #define CONFIG_MX28 /* i.MX28 SoC */ 28 #define CONFIG_MXS_GPIO /* GPIO control */ 29 #define CONFIG_SYS_HZ 1000 /* Ticks per second */ 30 31 #define CONFIG_MACH_TYPE MACH_TYPE_MX28EVK 32 33 #define CONFIG_SYS_NO_FLASH 34 #define CONFIG_BOARD_EARLY_INIT_F 35 #define CONFIG_ARCH_MISC_INIT 36 37 /* 38 * SPL 39 */ 40 #define CONFIG_SPL 41 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE 42 #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" 43 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" 44 #define CONFIG_SPL_LIBCOMMON_SUPPORT 45 #define CONFIG_SPL_LIBGENERIC_SUPPORT 46 #define CONFIG_SPL_GPIO_SUPPORT 47 48 /* 49 * U-Boot Commands 50 */ 51 #include <config_cmd_default.h> 52 #define CONFIG_DISPLAY_CPUINFO 53 #define CONFIG_DOS_PARTITION 54 55 #define CONFIG_CMD_CACHE 56 #define CONFIG_CMD_DATE 57 #define CONFIG_CMD_DHCP 58 #define CONFIG_CMD_FAT 59 #define CONFIG_CMD_GPIO 60 #define CONFIG_CMD_MII 61 #define CONFIG_CMD_MMC 62 #define CONFIG_CMD_NET 63 #define CONFIG_CMD_NFS 64 #define CONFIG_CMD_PING 65 #define CONFIG_CMD_SF 66 #define CONFIG_CMD_SPI 67 #define CONFIG_CMD_USB 68 #define CONFIG_CMD_BOOTZ 69 #define CONFIG_CMD_I2C 70 71 /* 72 * Memory configurations 73 */ 74 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ 75 #define PHYS_SDRAM_1 0x40000000 /* Base address */ 76 #define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */ 77 #define CONFIG_STACKSIZE (128 * 1024) /* 128 KB stack */ 78 #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ 79 #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ 80 #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ 81 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 82 /* Point initial SP in SRAM so SPL can use it too. */ 83 84 #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 85 #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024) 86 87 #define CONFIG_SYS_INIT_SP_OFFSET \ 88 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 89 #define CONFIG_SYS_INIT_SP_ADDR \ 90 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 91 92 /* 93 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some 94 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot 95 * binary. In case there was more of this mess, 0x100 bytes are skipped. 96 */ 97 #define CONFIG_SYS_TEXT_BASE 0x40000100 98 99 #define CONFIG_ENV_OVERWRITE 100 /* 101 * U-Boot general configurations 102 */ 103 #define CONFIG_SYS_LONGHELP 104 #define CONFIG_SYS_PROMPT "MX28EVK U-Boot > " 105 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 106 #define CONFIG_SYS_PBSIZE \ 107 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 108 /* Print buffer size */ 109 #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 110 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 111 /* Boot argument buffer size */ 112 #define CONFIG_VERSION_VARIABLE /* U-BOOT version */ 113 #define CONFIG_AUTO_COMPLETE /* Command auto complete */ 114 #define CONFIG_CMDLINE_EDITING /* Command history etc */ 115 #define CONFIG_SYS_HUSH_PARSER 116 117 /* 118 * Serial Driver 119 */ 120 #define CONFIG_PL011_SERIAL 121 #define CONFIG_PL011_CLOCK 24000000 122 #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } 123 #define CONFIG_CONS_INDEX 0 124 #define CONFIG_BAUDRATE 115200 /* Default baud rate */ 125 126 /* 127 * DMA 128 */ 129 #define CONFIG_APBH_DMA 130 131 /* 132 * MMC Driver 133 */ 134 #define CONFIG_ENV_IS_IN_MMC 135 #ifdef CONFIG_ENV_IS_IN_MMC 136 #define CONFIG_ENV_OFFSET (256 * 1024) 137 #define CONFIG_ENV_SIZE (16 * 1024) 138 #define CONFIG_SYS_MMC_ENV_DEV 0 139 #endif 140 #define CONFIG_CMD_SAVEENV 141 #ifdef CONFIG_CMD_MMC 142 #define CONFIG_MMC 143 #define CONFIG_GENERIC_MMC 144 #define CONFIG_MMC_BOUNCE_BUFFER 145 #define CONFIG_MXS_MMC 146 #endif 147 148 /* 149 * NAND Driver 150 */ 151 #ifdef CONFIG_CMD_NAND 152 #define CONFIG_NAND_MXS 153 #define CONFIG_SYS_MAX_NAND_DEVICE 1 154 #define CONFIG_SYS_NAND_BASE 0x60000000 155 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 156 #endif 157 158 /* 159 * Ethernet on SOC (FEC) 160 */ 161 #ifdef CONFIG_CMD_NET 162 #define CONFIG_NET_MULTI 163 #define CONFIG_ETHPRIME "FEC0" 164 #define CONFIG_FEC_MXC 165 #define CONFIG_FEC_MXC_MULTI 166 #define CONFIG_MII 167 #define CONFIG_FEC_XCV_TYPE RMII 168 #define CONFIG_MX28_FEC_MAC_IN_OCOTP 169 #endif 170 171 /* 172 * RTC 173 */ 174 #ifdef CONFIG_CMD_DATE 175 #define CONFIG_RTC_MXS 176 #endif 177 178 /* 179 * USB 180 */ 181 #ifdef CONFIG_CMD_USB 182 #define CONFIG_USB_EHCI 183 #define CONFIG_USB_EHCI_MXS 184 #define CONFIG_EHCI_MXS_PORT 1 185 #define CONFIG_EHCI_IS_TDI 186 #define CONFIG_USB_STORAGE 187 #endif 188 189 /* I2C */ 190 #ifdef CONFIG_CMD_I2C 191 #define CONFIG_I2C_MXS 192 #define CONFIG_HARD_I2C 193 #define CONFIG_SYS_I2C_SPEED 400000 194 #endif 195 196 /* 197 * SPI 198 */ 199 #ifdef CONFIG_CMD_SPI 200 #define CONFIG_HARD_SPI 201 #define CONFIG_MXS_SPI 202 #define CONFIG_SPI_HALF_DUPLEX 203 #define CONFIG_DEFAULT_SPI_BUS 2 204 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 205 206 /* SPI Flash */ 207 #ifdef CONFIG_CMD_SF 208 #define CONFIG_SPI_FLASH 209 #define CONFIG_SF_DEFAULT_BUS 2 210 #define CONFIG_SF_DEFAULT_CS 0 211 /* this may vary and depends on the installed chip */ 212 #define CONFIG_SPI_FLASH_SST 213 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 214 #define CONFIG_SF_DEFAULT_SPEED 24000000 215 216 /* (redundant) environemnt in SPI flash */ 217 #undef CONFIG_ENV_IS_IN_SPI_FLASH 218 #ifdef CONFIG_ENV_IS_IN_SPI_FLASH 219 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 220 #define CONFIG_ENV_SIZE 0x1000 /* 4KB */ 221 #define CONFIG_ENV_OFFSET 0x40000 /* 256K */ 222 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 223 #define CONFIG_ENV_SECT_SIZE 0x1000 224 #define CONFIG_ENV_SPI_CS 0 225 #define CONFIG_ENV_SPI_BUS 2 226 #define CONFIG_ENV_SPI_MAX_HZ 24000000 227 #define CONFIG_ENV_SPI_MODE SPI_MODE_0 228 #endif 229 #endif 230 #endif 231 232 /* 233 * Boot Linux 234 */ 235 #define CONFIG_CMDLINE_TAG 236 #define CONFIG_SETUP_MEMORY_TAGS 237 #define CONFIG_BOOTDELAY 3 238 #define CONFIG_BOOTFILE "uImage" 239 #define CONFIG_BOOTCOMMAND "run bootcmd_net" 240 #define CONFIG_LOADADDR 0x42000000 241 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 242 #define CONFIG_OF_LIBFDT 243 244 /* 245 * Extra Environments 246 */ 247 #define CONFIG_EXTRA_ENV_SETTINGS \ 248 "console_fsl=console=ttyAM0" \ 249 "console_mainline=console=ttyAMA0" \ 250 "netargs=setenv bootargs console=${console_mainline}" \ 251 "root=/dev/nfs " \ 252 "ip=dhcp nfsroot=${serverip}:${nfsroot}\0" \ 253 "bootcmd_net=echo Booting from net ...; " \ 254 "run netargs; " \ 255 "dhcp ${uimage}; bootm\0" \ 256 257 #endif /* __MX28EVK_CONFIG_H__ */ 258