1 /* 2 * (C) Copyright 2011 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_H 8 #define __CONFIG_H 9 10 #include <asm/arch/imx-regs.h> 11 12 /* High Level Configuration Options */ 13 14 #define CONFIG_MX25 15 #define CONFIG_SYS_TEXT_BASE 0x81200000 16 #define CONFIG_MXC_GPIO 17 18 #define CONFIG_DISPLAY_CPUINFO 19 #define CONFIG_DISPLAY_BOARDINFO 20 21 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 22 #define CONFIG_SETUP_MEMORY_TAGS 23 #define CONFIG_INITRD_TAG 24 25 #define CONFIG_MACH_TYPE MACH_TYPE_MX25_3DS 26 27 /* Size of malloc() pool */ 28 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 29 30 /* Physical Memory Map */ 31 32 #define CONFIG_NR_DRAM_BANKS 1 33 #define PHYS_SDRAM_1 0x80000000 34 #define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024) 35 36 #define CONFIG_BOARD_EARLY_INIT_F 37 #define CONFIG_BOARD_LATE_INIT 38 39 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 40 #define CONFIG_SYS_INIT_RAM_ADDR IMX_RAM_BASE 41 #define CONFIG_SYS_INIT_RAM_SIZE IMX_RAM_SIZE 42 43 #define CONFIG_SYS_INIT_SP_OFFSET \ 44 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 45 #define CONFIG_SYS_INIT_SP_ADDR \ 46 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 47 48 /* Memory Test */ 49 #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE/2) 50 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE) 51 52 /* Serial Info */ 53 #define CONFIG_MXC_UART 54 #define CONFIG_MXC_UART_BASE UART1_BASE 55 #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ 56 #define CONFIG_BAUDRATE 115200 /* Default baud rate */ 57 58 /* No NOR flash present */ 59 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 60 #define CONFIG_ENV_SIZE (8 * 1024) 61 62 #define CONFIG_SYS_NO_FLASH 63 #define CONFIG_ENV_IS_IN_MMC 64 #define CONFIG_SYS_MMC_ENV_DEV 0 65 66 /* U-Boot general configuration */ 67 #define CONFIG_SYS_PROMPT "MX25PDK U-Boot > " 68 #define CONFIG_AUTO_COMPLETE 69 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 70 /* Print buffer sz */ 71 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 72 sizeof(CONFIG_SYS_PROMPT) + 16) 73 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 74 /* Boot Argument Buffer Size */ 75 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 76 #define CONFIG_CMDLINE_EDITING 77 #define CONFIG_SYS_LONGHELP 78 79 /* U-Boot commands */ 80 #include <config_cmd_default.h> 81 #define CONFIG_OF_LIBFDT 82 #define CONFIG_CMD_BOOTZ 83 #define CONFIG_CMD_CACHE 84 #define CONFIG_CMD_MMC 85 #define CONFIG_CMD_EXT2 86 #define CONFIG_CMD_FAT 87 88 /* Ethernet */ 89 #define CONFIG_FEC_MXC 90 #define CONFIG_FEC_MXC_PHYADDR 0x1f 91 #define CONFIG_MII 92 #define CONFIG_CMD_NET 93 #define CONFIG_ENV_OVERWRITE 94 95 /* ESDHC driver */ 96 #define CONFIG_MMC 97 #define CONFIG_GENERIC_MMC 98 #define CONFIG_FSL_ESDHC 99 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 100 #define CONFIG_SYS_FSL_ESDHC_NUM 1 101 102 /* PMIC Configs */ 103 #define CONFIG_POWER 104 #define CONFIG_POWER_I2C 105 #define CONFIG_POWER_FSL 106 #define CONFIG_PMIC_FSL_MC34704 107 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x54 108 109 #define CONFIG_DOS_PARTITION 110 111 /* I2C Configs */ 112 #define CONFIG_CMD_I2C 113 #define CONFIG_SYS_I2C 114 #define CONFIG_SYS_I2C_MXC 115 #define CONFIG_SYS_SPD_BUS_NUM 0 /* I2C1 */ 116 117 /* RTC */ 118 #define CONFIG_RTC_IMXDI 119 #define CONFIG_CMD_DATE 120 121 /* Ethernet Configs */ 122 123 #define CONFIG_CMD_PING 124 #define CONFIG_CMD_DHCP 125 #define CONFIG_CMD_MII 126 #define CONFIG_CMD_NET 127 128 #define CONFIG_BOOTDELAY 1 129 130 #define CONFIG_LOADADDR 0x81000000 /* loadaddr env var */ 131 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 132 133 #define CONFIG_EXTRA_ENV_SETTINGS \ 134 "script=boot.scr\0" \ 135 "uimage=uImage\0" \ 136 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 137 "root=/dev/nfs " \ 138 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 139 "bootcmd=run netargs; dhcp ${uimage}; bootm\0" \ 140 141 #endif /* __CONFIG_H */ 142