1 /* 2 * (C) Copyright 2011 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_H 8 #define __CONFIG_H 9 10 #include <asm/arch/imx-regs.h> 11 12 /* High Level Configuration Options */ 13 14 #define CONFIG_MX25 15 #define CONFIG_SYS_TEXT_BASE 0x81200000 16 #define CONFIG_MXC_GPIO 17 18 #define CONFIG_SYS_TIMER_RATE 32768 19 #define CONFIG_SYS_TIMER_COUNTER \ 20 (&((struct gpt_regs *)IMX_GPT1_BASE)->counter) 21 22 #define CONFIG_DISPLAY_CPUINFO 23 #define CONFIG_DISPLAY_BOARDINFO 24 25 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 26 #define CONFIG_SETUP_MEMORY_TAGS 27 #define CONFIG_INITRD_TAG 28 29 #define CONFIG_MACH_TYPE MACH_TYPE_MX25_3DS 30 31 /* Size of malloc() pool */ 32 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 33 34 /* Physical Memory Map */ 35 36 #define CONFIG_NR_DRAM_BANKS 1 37 #define PHYS_SDRAM_1 0x80000000 38 #define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024) 39 40 #define CONFIG_BOARD_EARLY_INIT_F 41 #define CONFIG_BOARD_LATE_INIT 42 43 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 44 #define CONFIG_SYS_INIT_RAM_ADDR IMX_RAM_BASE 45 #define CONFIG_SYS_INIT_RAM_SIZE IMX_RAM_SIZE 46 47 #define CONFIG_SYS_INIT_SP_OFFSET \ 48 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 49 #define CONFIG_SYS_INIT_SP_ADDR \ 50 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 51 52 /* Memory Test */ 53 #define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE/2) 54 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE) 55 56 /* Serial Info */ 57 #define CONFIG_MXC_UART 58 #define CONFIG_MXC_UART_BASE UART1_BASE 59 #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ 60 #define CONFIG_BAUDRATE 115200 /* Default baud rate */ 61 62 /* No NOR flash present */ 63 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 64 #define CONFIG_ENV_SIZE (8 * 1024) 65 66 #define CONFIG_SYS_NO_FLASH 67 #define CONFIG_ENV_IS_IN_MMC 68 #define CONFIG_SYS_MMC_ENV_DEV 0 69 70 /* U-Boot general configuration */ 71 #define CONFIG_AUTO_COMPLETE 72 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 73 /* Print buffer sz */ 74 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 75 sizeof(CONFIG_SYS_PROMPT) + 16) 76 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 77 /* Boot Argument Buffer Size */ 78 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 79 #define CONFIG_CMDLINE_EDITING 80 #define CONFIG_SYS_LONGHELP 81 82 /* U-Boot commands */ 83 #include <config_cmd_default.h> 84 #define CONFIG_OF_LIBFDT 85 #define CONFIG_CMD_BOOTZ 86 #define CONFIG_CMD_CACHE 87 #define CONFIG_CMD_MMC 88 #define CONFIG_CMD_EXT2 89 #define CONFIG_CMD_FAT 90 91 /* Ethernet */ 92 #define CONFIG_FEC_MXC 93 #define CONFIG_FEC_MXC_PHYADDR 0x1f 94 #define CONFIG_MII 95 #define CONFIG_CMD_NET 96 #define CONFIG_ENV_OVERWRITE 97 98 /* ESDHC driver */ 99 #define CONFIG_MMC 100 #define CONFIG_GENERIC_MMC 101 #define CONFIG_FSL_ESDHC 102 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 103 #define CONFIG_SYS_FSL_ESDHC_NUM 1 104 105 /* PMIC Configs */ 106 #define CONFIG_POWER 107 #define CONFIG_POWER_I2C 108 #define CONFIG_POWER_FSL 109 #define CONFIG_PMIC_FSL_MC34704 110 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x54 111 112 #define CONFIG_DOS_PARTITION 113 114 /* I2C Configs */ 115 #define CONFIG_CMD_I2C 116 #define CONFIG_SYS_I2C 117 #define CONFIG_SYS_I2C_MXC 118 119 /* RTC */ 120 #define CONFIG_RTC_IMXDI 121 #define CONFIG_CMD_DATE 122 123 /* Ethernet Configs */ 124 125 #define CONFIG_CMD_PING 126 #define CONFIG_CMD_DHCP 127 #define CONFIG_CMD_MII 128 #define CONFIG_CMD_NET 129 130 #define CONFIG_BOOTDELAY 1 131 132 #define CONFIG_LOADADDR 0x81000000 /* loadaddr env var */ 133 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 134 135 #define CONFIG_EXTRA_ENV_SETTINGS \ 136 "script=boot.scr\0" \ 137 "uimage=uImage\0" \ 138 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 139 "root=/dev/nfs " \ 140 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 141 "bootcmd=run netargs; dhcp ${uimage}; bootm\0" \ 142 143 #endif /* __CONFIG_H */ 144