1 /* 2 * Copyright (C) 2016 Stefan Roese <sr@denx.de> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _CONFIG_MVEBU_ARMADA_37XX_H 8 #define _CONFIG_MVEBU_ARMADA_37XX_H 9 10 /* 11 * High Level Configuration Options (easy to change) 12 */ 13 #define CONFIG_DISPLAY_BOARDINFO_LATE 14 15 #define CONFIG_SYS_TEXT_BASE 0x00000000 16 17 /* additions for new ARM relocation support */ 18 #define CONFIG_SYS_SDRAM_BASE 0x00000000 19 20 #define CONFIG_NR_DRAM_BANKS 1 21 22 /* auto boot */ 23 #define CONFIG_PREBOOT 24 25 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ 26 115200, 230400, 460800, 921600 } 27 28 /* 29 * For booting Linux, the board info and command line data 30 * have to be in the first 8 MB of memory, since this is 31 * the maximum mapped by the Linux kernel during initialization. 32 */ 33 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 34 #define CONFIG_INITRD_TAG /* enable INITRD tag */ 35 #define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ 36 37 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ 38 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 39 +sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */ 40 41 /* 42 * Size of malloc() pool 43 */ 44 #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MiB for malloc() */ 45 46 /* 47 * Other required minimal configurations 48 */ 49 #define CONFIG_SYS_LONGHELP 50 #define CONFIG_AUTO_COMPLETE 51 #define CONFIG_CMDLINE_EDITING 52 #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ 53 #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ 54 #define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ 55 #define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */ 56 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ 57 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ 58 59 #define CONFIG_SYS_ALT_MEMTEST 60 61 /* End of 16M scrubbed by training in bootrom */ 62 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000) 63 64 /* 65 * I2C 66 */ 67 #define CONFIG_I2C_MV 68 #define CONFIG_SYS_I2C_SLAVE 0x0 69 70 /* 71 * SPI Flash configuration 72 */ 73 #define CONFIG_ENV_SPI_BUS 0 74 #define CONFIG_ENV_SPI_CS 0 75 76 /* SPI NOR flash default params, used by sf commands */ 77 #define CONFIG_SF_DEFAULT_SPEED 1000000 78 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 79 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 80 81 /* Environment in SPI NOR flash */ 82 #define CONFIG_ENV_IS_IN_SPI_FLASH 83 #define CONFIG_ENV_OFFSET 0x180000 /* as Marvell U-Boot version */ 84 #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ 85 #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ 86 87 /* 88 * Ethernet Driver configuration 89 */ 90 #define CONFIG_MVNETA /* Enable Marvell Gbe Controller Driver */ 91 #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ 92 #define CONFIG_PHY_GIGE /* GbE speed/duplex detect */ 93 #define CONFIG_ARP_TIMEOUT 200 94 #define CONFIG_NET_RETRY_COUNT 50 95 #define CONFIG_PHY_MARVELL 96 97 /* USB 2.0 */ 98 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 99 100 /* USB 3.0 */ 101 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 3 102 103 #define CONFIG_USB_MAX_CONTROLLER_COUNT (CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS + \ 104 CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS) 105 106 /* USB ethernet */ 107 #define CONFIG_USB_HOST_ETHER 108 #define CONFIG_USB_ETHER_ASIX 109 #define CONFIG_USB_ETHER_MCS7830 110 #define CONFIG_USB_ETHER_RTL8152 111 #define CONFIG_USB_ETHER_SMSC95XX 112 113 /* 114 * SATA/SCSI/AHCI configuration 115 */ 116 #define CONFIG_SCSI_AHCI 117 #define CONFIG_SCSI_AHCI_PLAT 118 #define CONFIG_LIBATA 119 #define CONFIG_LBA48 120 #define CONFIG_SYS_64BIT_LBA 121 122 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 123 #define CONFIG_SYS_SCSI_MAX_LUN 1 124 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 125 CONFIG_SYS_SCSI_MAX_LUN) 126 127 #define CONFIG_SUPPORT_VFAT 128 129 #endif /* _CONFIG_MVEBU_ARMADA_37XX_H */ 130