1 /* 2 * (C) Copyright 2010 3 * Marvell Semiconductor <www.marvell.com> 4 * Written-by: Prafulla Wadaskar <prafulla@marvell.com> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 22 * MA 02110-1301 USA 23 */ 24 25 /* 26 * This file contains Marvell Board Specific common defincations. 27 * This file should be included in board config header file. 28 * 29 * It supports common definations for Kirkwood platform 30 * TBD: support for Orion5X platforms 31 */ 32 33 #ifndef _MV_COMMON_H 34 #define _MV_COMMON_H 35 36 /* 37 * High Level Configuration Options (easy to change) 38 */ 39 #define CONFIG_MARVELL 1 40 #define CONFIG_ARM926EJS 1 /* Basic Architecture */ 41 42 /* ====> Kirkwood Platform Common Definations */ 43 #if defined(CONFIG_KIRKWOOD) 44 #define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */ 45 #define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ 46 #define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ 47 #define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 for kernel */ 48 49 /* 50 * By default kwbimage.cfg from board specific folder is used 51 * If for some board, different configuration file need to be used, 52 * CONFIG_SYS_KWD_CONFIG should be defined in board specific header file 53 */ 54 #ifndef CONFIG_SYS_KWD_CONFIG 55 #define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage.cfg 56 #endif /* CONFIG_SYS_KWD_CONFIG */ 57 58 /* Kirkwood has 2k of Security SRAM, use it for SP */ 59 #define CONFIG_SYS_INIT_SP_ADDR 0xC8012000 60 #define CONFIG_NR_DRAM_BANKS_MAX 2 61 62 #define CONFIG_I2C_MVTWSI_BASE KW_TWSI_BASE 63 #define MV_UART_CONSOLE_BASE KW_UART0_BASE 64 #define MV_SATA_BASE KW_SATA_BASE 65 #define MV_SATA_PORT0_OFFSET KW_SATA_PORT0_OFFSET 66 #define MV_SATA_PORT1_OFFSET KW_SATA_PORT1_OFFSET 67 68 /* ====> ARMADA100 Platform Common Definations */ 69 #elif defined (CONFIG_ARMADA100) 70 71 #define CONFIG_SYS_TCLK (14745600) /* NS16550 clk config */ 72 #define CONFIG_SYS_HZ_CLOCK (3250000) /* Timer Freq. 3.25MHZ */ 73 #define CONFIG_MARVELL_MFP /* Enable mvmfp driver */ 74 #define MV_MFPR_BASE ARMD1_MFPR_BASE 75 #define MV_UART_CONSOLE_BASE ARMD1_UART1_BASE 76 #define CONFIG_SYS_NS16550_IER (1 << 6) /* Bit 6 in UART_IER register 77 represents UART Unit Enable */ 78 /* 79 * There is no internal RAM in ARMADA100, using DRAM 80 * TBD: dcache to be used for this 81 */ 82 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - 0x00200000) 83 #define CONFIG_NR_DRAM_BANKS_MAX 2 84 85 #else 86 #error "Unsupported SoC Platform..." 87 #endif 88 89 /* 90 * Custom CONFIG_SYS_TEXT_BASE can be done in <board>.h 91 */ 92 #ifndef CONFIG_SYS_TEXT_BASE 93 #define CONFIG_SYS_TEXT_BASE 0x00600000 94 #endif /* CONFIG_SYS_TEXT_BASE */ 95 96 /* additions for new ARM relocation support */ 97 #define CONFIG_SYS_SDRAM_BASE 0x00000000 98 99 /* 100 * CLKs configurations 101 */ 102 #define CONFIG_SYS_HZ 1000 103 104 /* 105 * NS16550 Configuration 106 */ 107 #define CONFIG_SYS_NS16550 108 #define CONFIG_SYS_NS16550_SERIAL 109 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 110 #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK 111 #define CONFIG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE 112 113 /* 114 * Serial Port configuration 115 * The following definitions let you select what serial you want to use 116 * for your console driver. 117 */ 118 119 #define CONFIG_CONS_INDEX 1 /*Console on UART0 */ 120 #define CONFIG_BAUDRATE 115200 121 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ 122 115200,230400, 460800, 921600 } 123 /* auto boot */ 124 #define CONFIG_BOOTDELAY 3 /* default enable autoboot */ 125 126 /* 127 * For booting Linux, the board info and command line data 128 * have to be in the first 8 MB of memory, since this is 129 * the maximum mapped by the Linux kernel during initialization. 130 */ 131 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 132 #define CONFIG_INITRD_TAG 1 /* enable INITRD tag */ 133 #define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */ 134 135 #define CONFIG_SYS_PROMPT "Marvell>> " /* Command Prompt */ 136 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ 137 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 138 +sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */ 139 140 /* 141 * NAND configuration 142 */ 143 #ifdef CONFIG_CMD_NAND 144 #define CONFIG_NAND_KIRKWOOD 145 #define CONFIG_SYS_MAX_NAND_DEVICE 1 146 #define NAND_MAX_CHIPS 1 147 #define CONFIG_SYS_NAND_BASE 0xD8000000 /* MV_DEFADR_NANDF */ 148 #define NAND_ALLOW_ERASE_ALL 1 149 #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ 150 #endif 151 152 /* 153 * SPI Flash configuration 154 */ 155 #ifdef CONFIG_CMD_SF 156 #define CONFIG_SPI_FLASH 1 157 #define CONFIG_HARD_SPI 1 158 #define CONFIG_KIRKWOOD_SPI 1 159 #define CONFIG_SPI_FLASH_MACRONIX 1 160 #define CONFIG_ENV_SPI_BUS 0 161 #define CONFIG_ENV_SPI_CS 0 162 #define CONFIG_ENV_SPI_MAX_HZ 50000000 /*50Mhz */ 163 #endif 164 165 /* 166 * Size of malloc() pool 167 */ 168 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* 1MiB for malloc() */ 169 /* size in bytes reserved for initial data */ 170 171 /* 172 * Other required minimal configurations 173 */ 174 #define CONFIG_SYS_LONGHELP 175 #define CONFIG_AUTO_COMPLETE 176 #define CONFIG_CMDLINE_EDITING 177 #define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */ 178 #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ 179 #ifndef CONFIG_ARMADA100 /* will be removed latter */ 180 #define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ 181 #endif /* CONFIG_ARMADA100 */ 182 #define CONFIG_BOARD_EARLY_INIT_F /* call board_init_f for early inits */ 183 #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ 184 #define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */ 185 #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ 186 #define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ 187 #define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */ 188 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ 189 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 190 191 /* 192 * DRAM Banks configuration, Custom config can be done in <board>.h 193 */ 194 #ifndef CONFIG_NR_DRAM_BANKS 195 #define CONFIG_NR_DRAM_BANKS CONFIG_NR_DRAM_BANKS_MAX 196 #else 197 #if (CONFIG_NR_DRAM_BANKS > CONFIG_NR_DRAM_BANKS_MAX) 198 #error CONFIG_NR_DRAM_BANKS Configurated more than available 199 #endif 200 #endif /* CONFIG_NR_DRAM_BANKS */ 201 202 /* 203 * Ethernet Driver configuration 204 */ 205 #ifdef CONFIG_CMD_NET 206 #define CONFIG_CMD_MII 207 #define CONFIG_NETCONSOLE /* include NetConsole support */ 208 #define CONFIG_NET_MULTI /* specify more that one ports available */ 209 #define CONFIG_MII /* expose smi ove miiphy interface */ 210 #define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */ 211 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ 212 #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ 213 #define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */ 214 #endif /* CONFIG_CMD_NET */ 215 216 /* 217 * USB/EHCI 218 */ 219 #ifdef CONFIG_CMD_USB 220 #define CONFIG_USB_EHCI /* Enable EHCI USB support */ 221 #define CONFIG_USB_EHCI_KIRKWOOD 222 #define CONFIG_EHCI_IS_TDI 223 #define CONFIG_USB_STORAGE 224 #define CONFIG_DOS_PARTITION 225 #define CONFIG_ISO_PARTITION 226 #define CONFIG_SUPPORT_VFAT 227 #endif /* CONFIG_CMD_USB */ 228 229 /* 230 * IDE Support on SATA ports 231 */ 232 #ifdef CONFIG_CMD_IDE 233 #define __io 234 #define CONFIG_CMD_EXT2 235 #define CONFIG_MVSATA_IDE 236 #define CONFIG_IDE_PREINIT 237 #define CONFIG_MVSATA_IDE_USE_PORT1 238 /* Needs byte-swapping for ATA data register */ 239 #define CONFIG_IDE_SWAP_IO 240 /* Data, registers and alternate blocks are at the same offset */ 241 #define CONFIG_SYS_ATA_DATA_OFFSET (0x0100) 242 #define CONFIG_SYS_ATA_REG_OFFSET (0x0100) 243 #define CONFIG_SYS_ATA_ALT_OFFSET (0x0100) 244 /* Each 8-bit ATA register is aligned to a 4-bytes address */ 245 #define CONFIG_SYS_ATA_STRIDE 4 246 /* Controller supports 48-bits LBA addressing */ 247 #define CONFIG_LBA48 248 /* CONFIG_CMD_IDE requires some #defines for ATA registers */ 249 #define CONFIG_SYS_IDE_MAXBUS 2 250 #define CONFIG_SYS_IDE_MAXDEVICE 2 251 /* ATA registers base is at SATA controller base */ 252 #define CONFIG_SYS_ATA_BASE_ADDR MV_SATA_BASE 253 #endif /* CONFIG_CMD_IDE */ 254 255 /* 256 * I2C related stuff 257 */ 258 #ifdef CONFIG_CMD_I2C 259 #define CONFIG_I2C_MVTWSI 260 #define CONFIG_SYS_I2C_SLAVE 0x0 261 #define CONFIG_SYS_I2C_SPEED 100000 262 #endif 263 264 /* 265 * File system 266 */ 267 #ifndef CONFIG_ARMADA100 /* will be removed latter */ 268 #define CONFIG_CMD_EXT2 269 #define CONFIG_CMD_JFFS2 270 #define CONFIG_CMD_FAT 271 #define CONFIG_CMD_UBI 272 #define CONFIG_CMD_UBIFS 273 #define CONFIG_RBTREE 274 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 275 #define CONFIG_MTD_PARTITIONS 276 #define CONFIG_CMD_MTDPARTS 277 #define CONFIG_LZO 278 #endif /* CONFIG_ARMADA100 */ 279 280 #endif /* _MV_COMMON_H */ 281