xref: /openbmc/u-boot/include/configs/mv-common.h (revision 25ddd1fb)
1 /*
2  * (C) Copyright 2010
3  * Marvell Semiconductor <www.marvell.com>
4  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
5  *
6  * See file CREDITS for list of people who contributed to this
7  * project.
8  *
9  * This program is free software; you can redistribute it and/or
10  * modify it under the terms of the GNU General Public License as
11  * published by the Free Software Foundation; either version 2 of
12  * the License, or (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
22  * MA 02110-1301 USA
23  */
24 
25 /*
26  * This file contains Marvell Board Specific common defincations.
27  * This file should be included in board config header file.
28  *
29  * It supports common definations for Kirkwood platform
30  * TBD: support for Orion5X platforms
31  */
32 
33 #ifndef _MV_COMMON_H
34 #define _MV_COMMON_H
35 
36 /*
37  * High Level Configuration Options (easy to change)
38  */
39 #define CONFIG_MARVELL		1
40 #define CONFIG_ARM926EJS	1	/* Basic Architecture */
41 
42 #if defined(CONFIG_KIRKWOOD)
43 #define CONFIG_MD5	/* get_random_hex on krikwood needs MD5 support */
44 #define CONFIG_KIRKWOOD_EGIGA_INIT	/* Enable GbePort0/1 for kernel */
45 #define CONFIG_KIRKWOOD_RGMII_PAD_1V8	/* Set RGMII Pad voltage to 1.8V */
46 #define CONFIG_KIRKWOOD_PCIE_INIT       /* Enable PCIE Port0 for kernel */
47 
48 #define CONFIG_I2C_MVTWSI_BASE	KW_TWSI_BASE
49 #define MV_UART0_BASE		KW_UART0_BASE
50 #define MV_SATA_BASE		KW_SATA_BASE
51 #define MV_SATA_PORT0_OFFSET	KW_SATA_PORT0_OFFSET
52 #define MV_SATA_PORT1_OFFSET	KW_SATA_PORT1_OFFSET
53 
54 #else
55 #error "Unsupported SoC"
56 #endif
57 
58 /* additions for new ARM relocation support */
59 #define CONFIG_SYS_SDRAM_BASE		0x00000000
60 /* Kirkwood has 2k of Security SRAM, use it for SP */
61 #define CONFIG_SYS_INIT_SP_ADDR		0xC8012000
62 
63 /*
64  * CLKs configurations
65  */
66 #define CONFIG_SYS_HZ		1000
67 
68 /*
69  * NS16550 Configuration
70  */
71 #define CONFIG_SYS_NS16550
72 #define CONFIG_SYS_NS16550_SERIAL
73 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
74 #define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
75 #define CONFIG_SYS_NS16550_COM1		MV_UART0_BASE
76 
77 /*
78  * Serial Port configuration
79  * The following definitions let you select what serial you want to use
80  * for your console driver.
81  */
82 
83 #define CONFIG_CONS_INDEX	1	/*Console on UART0 */
84 #define CONFIG_BAUDRATE			115200
85 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, \
86 					  115200,230400, 460800, 921600 }
87 /* auto boot */
88 #define CONFIG_BOOTDELAY	3	/* default enable autoboot */
89 
90 /*
91  * For booting Linux, the board info and command line data
92  * have to be in the first 8 MB of memory, since this is
93  * the maximum mapped by the Linux kernel during initialization.
94  */
95 #define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs  */
96 #define CONFIG_INITRD_TAG	1	/* enable INITRD tag */
97 #define CONFIG_SETUP_MEMORY_TAGS 1	/* enable memory tag */
98 
99 #define	CONFIG_SYS_PROMPT	"Marvell>> "	/* Command Prompt */
100 #define	CONFIG_SYS_CBSIZE	1024	/* Console I/O Buff Size */
101 #define	CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE \
102 		+sizeof(CONFIG_SYS_PROMPT) + 16)	/* Print Buff */
103 
104 /*
105  * NAND configuration
106  */
107 #ifdef CONFIG_CMD_NAND
108 #define CONFIG_NAND_KIRKWOOD
109 #define CONFIG_SYS_MAX_NAND_DEVICE	1
110 #define NAND_MAX_CHIPS			1
111 #define CONFIG_SYS_NAND_BASE		0xD8000000	/* MV_DEFADR_NANDF */
112 #define NAND_ALLOW_ERASE_ALL		1
113 #define CONFIG_SYS_64BIT_VSPRINTF	/* needed for nand_util.c */
114 #endif
115 
116 /*
117  * SPI Flash configuration
118  */
119 #ifdef CONFIG_CMD_SF
120 #define CONFIG_SPI_FLASH		1
121 #define CONFIG_HARD_SPI			1
122 #define CONFIG_KIRKWOOD_SPI		1
123 #define CONFIG_SPI_FLASH_MACRONIX	1
124 #define CONFIG_ENV_SPI_BUS		0
125 #define CONFIG_ENV_SPI_CS		0
126 #define CONFIG_ENV_SPI_MAX_HZ		50000000	/*50Mhz */
127 #endif
128 
129 /*
130  * Size of malloc() pool
131  */
132 #define CONFIG_SYS_MALLOC_LEN	(1024 * 1024) /* 1MiB for malloc() */
133 /* size in bytes reserved for initial data */
134 
135 /*
136  * Other required minimal configurations
137  */
138 #define CONFIG_SYS_LONGHELP
139 #define CONFIG_AUTO_COMPLETE
140 #define CONFIG_CMDLINE_EDITING
141 #define CONFIG_CONSOLE_INFO_QUIET	/* some code reduction */
142 #define CONFIG_ARCH_CPU_INIT	/* call arch_cpu_init() */
143 #define CONFIG_ARCH_MISC_INIT	/* call arch_misc_init() */
144 #define CONFIG_DISPLAY_CPUINFO	/* Display cpu info */
145 #define CONFIG_NR_DRAM_BANKS	4
146 #define CONFIG_STACKSIZE	0x00100000	/* regular stack- 1M */
147 #define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */
148 #define CONFIG_SYS_MEMTEST_START 0x00400000	/* 4M */
149 #define CONFIG_SYS_MEMTEST_END	0x007fffff	/*(_8M -1) */
150 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */
151 #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
152 
153 /*
154  * Ethernet Driver configuration
155  */
156 #ifdef CONFIG_CMD_NET
157 #define CONFIG_CMD_MII
158 #define CONFIG_NETCONSOLE	/* include NetConsole support   */
159 #define CONFIG_NET_MULTI	/* specify more that one ports available */
160 #define	CONFIG_MII		/* expose smi ove miiphy interface */
161 #define CONFIG_MVGBE		/* Enable Marvell Gbe Controller Driver */
162 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/* detect link using phy */
163 #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
164 #define CONFIG_RESET_PHY_R	/* use reset_phy() to init mv8831116 PHY */
165 #endif /* CONFIG_CMD_NET */
166 
167 /*
168  * USB/EHCI
169  */
170 #ifdef CONFIG_CMD_USB
171 #define CONFIG_USB_EHCI		/* Enable EHCI USB support */
172 #define CONFIG_USB_EHCI_KIRKWOOD
173 #define CONFIG_EHCI_IS_TDI
174 #define CONFIG_USB_STORAGE
175 #define CONFIG_DOS_PARTITION
176 #define CONFIG_ISO_PARTITION
177 #define CONFIG_SUPPORT_VFAT
178 #endif /* CONFIG_CMD_USB */
179 
180 /*
181  * IDE Support on SATA ports
182  */
183 #ifdef CONFIG_CMD_IDE
184 #define __io
185 #define CONFIG_CMD_EXT2
186 #define CONFIG_MVSATA_IDE
187 #define CONFIG_IDE_PREINIT
188 #define CONFIG_MVSATA_IDE_USE_PORT1
189 /* Needs byte-swapping for ATA data register */
190 #define CONFIG_IDE_SWAP_IO
191 /* Data, registers and alternate blocks are at the same offset */
192 #define CONFIG_SYS_ATA_DATA_OFFSET	(0x0100)
193 #define CONFIG_SYS_ATA_REG_OFFSET	(0x0100)
194 #define CONFIG_SYS_ATA_ALT_OFFSET	(0x0100)
195 /* Each 8-bit ATA register is aligned to a 4-bytes address */
196 #define CONFIG_SYS_ATA_STRIDE		4
197 /* Controller supports 48-bits LBA addressing */
198 #define CONFIG_LBA48
199 /* CONFIG_CMD_IDE requires some #defines for ATA registers */
200 #define CONFIG_SYS_IDE_MAXBUS		2
201 #define CONFIG_SYS_IDE_MAXDEVICE	2
202 /* ATA registers base is at SATA controller base */
203 #define CONFIG_SYS_ATA_BASE_ADDR	MV_SATA_BASE
204 #endif /* CONFIG_CMD_IDE */
205 
206 /*
207  * I2C related stuff
208  */
209 #ifdef CONFIG_CMD_I2C
210 #define CONFIG_I2C_MVTWSI
211 #define CONFIG_SYS_I2C_SLAVE		0x0
212 #define CONFIG_SYS_I2C_SPEED		100000
213 #endif
214 
215 /*
216  * File system
217  */
218 #define CONFIG_CMD_EXT2
219 #define CONFIG_CMD_JFFS2
220 #define CONFIG_CMD_FAT
221 #define CONFIG_CMD_UBI
222 #define CONFIG_CMD_UBIFS
223 #define CONFIG_RBTREE
224 #define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
225 #define CONFIG_MTD_PARTITIONS
226 #define CONFIG_CMD_MTDPARTS
227 #define CONFIG_LZO
228 
229 #endif /* _MV_COMMON_H */
230