1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Configuration for MediaTek MT7629 SoC 4 * 5 * Copyright (C) 2018 MediaTek Inc. 6 * Author: Ryder Lee <ryder.lee@mediatek.com> 7 */ 8 9 #ifndef __MT7629_H 10 #define __MT7629_H 11 12 #include <linux/sizes.h> 13 14 /* Miscellaneous configurable options */ 15 #define CONFIG_SETUP_MEMORY_TAGS 16 #define CONFIG_INITRD_TAG 17 #define CONFIG_CMDLINE_TAG 18 19 #define CONFIG_SYS_MAXARGS 8 20 #define CONFIG_SYS_BOOTM_LEN SZ_64M 21 #define CONFIG_SYS_CBSIZE SZ_1K 22 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 23 sizeof(CONFIG_SYS_PROMPT) + 16) 24 25 /* Size of malloc() pool */ 26 #define CONFIG_SYS_MALLOC_LEN SZ_4M 27 28 /* Environment */ 29 #define CONFIG_ENV_SIZE SZ_4K 30 /* Allow to overwrite serial and ethaddr */ 31 #define CONFIG_ENV_OVERWRITE 32 33 /* Defines for SPL */ 34 #define CONFIG_SPL_STACK 0x106000 35 #define CONFIG_SPL_TEXT_BASE 0x201000 36 #define CONFIG_SPL_MAX_SIZE SZ_64K 37 #define CONFIG_SPL_MAX_FOOTPRINT SZ_64K 38 #define CONFIG_SPL_PAD_TO 0x10000 39 40 #define CONFIG_SPI_ADDR 0x30000000 41 #define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO 42 #define CONFIG_SYS_UBOOT_BASE (CONFIG_SPI_ADDR + CONFIG_SPL_PAD_TO) 43 44 /* SPL -> Uboot */ 45 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 46 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \ 47 GENERATED_GBL_DATA_SIZE) 48 49 /* UBoot -> Kernel */ 50 #define CONFIG_SYS_SPL_ARGS_ADDR 0x40000000 51 #define CONFIG_LOADADDR 0x42007f1c 52 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 53 54 /* DRAM */ 55 #define CONFIG_SYS_SDRAM_BASE 0x40000000 56 57 #endif 58