1 /* 2 * Configuation settings for the Hitachi Solution Engine 7750 3 * 4 * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __MS7750SE_H 10 #define __MS7750SE_H 11 12 #define CONFIG_CPU_SH7750 1 13 /* #define CONFIG_CPU_SH7751 1 */ 14 /* #define CONFIG_CPU_TYPE_R 1 */ 15 #define __LITTLE_ENDIAN__ 1 16 17 #define CONFIG_DISPLAY_BOARDINFO 18 19 /* 20 * Command line configuration. 21 */ 22 #define CONFIG_CONS_SCIF1 1 23 24 #define CONFIG_ENV_OVERWRITE 1 25 26 /* SDRAM */ 27 #define CONFIG_SYS_SDRAM_BASE (0x8C000000) 28 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) 29 30 #define CONFIG_SYS_PBSIZE 256 31 32 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 33 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) 34 35 /* NOR Flash */ 36 /* #define CONFIG_SYS_FLASH_BASE (0xA1000000)*/ 37 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 38 #define CONFIG_SYS_MAX_FLASH_BANKS (1) /* Max number of 39 * Flash memory banks 40 */ 41 #define CONFIG_SYS_MAX_FLASH_SECT 142 42 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 43 44 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) 45 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) /* Address of u-boot image in Flash */ 46 #define CONFIG_SYS_MONITOR_LEN (128 * 1024) 47 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */ 48 49 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 50 #define CONFIG_SYS_RX_ETH_BUFFER (8) 51 52 #define CONFIG_SYS_FLASH_CFI 53 #define CONFIG_FLASH_CFI_DRIVER 54 #undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE 55 #undef CONFIG_SYS_FLASH_QUIET_TEST 56 #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ 57 58 #define CONFIG_ENV_SECT_SIZE 0x20000 59 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 60 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 61 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 62 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 63 64 /* Board Clock */ 65 #define CONFIG_SYS_CLK_FREQ 33333333 66 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 67 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 68 #define CONFIG_SYS_TMU_CLK_DIV 4 69 70 #endif /* __MS7750SE_H */ 71