xref: /openbmc/u-boot/include/configs/mpr2.h (revision a9a274c1)
1 /*
2  * Configuation settings for MPR2
3  *
4  * Copyright (C) 2008
5  * Mark Jonas <mark.jonas@de.bosch.com>
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __MPR2_H
11 #define __MPR2_H
12 
13 /* Supported commands */
14 #define CONFIG_CMD_SAVEENV
15 #define CONFIG_CMD_CACHE
16 #define CONFIG_CMD_MEMORY
17 #define CONFIG_CMD_FLASH
18 
19 /* Default environment variables */
20 #define CONFIG_BAUDRATE		115200
21 #define CONFIG_BOOTARGS		"console=ttySC0,115200"
22 #define CONFIG_BOOTFILE		"/boot/zImage"
23 #define CONFIG_LOADADDR		0x8E000000
24 #define CONFIG_VERSION_VARIABLE
25 
26 /* CPU and platform */
27 #define CONFIG_CPU_SH7720	1
28 #define CONFIG_MPR2		1
29 
30 /* U-Boot internals */
31 #define CONFIG_SYS_LONGHELP			/* undef to save memory	*/
32 #define CONFIG_SYS_CBSIZE		256	/* Buffer size for input from the Console */
33 #define CONFIG_SYS_PBSIZE		256	/* Buffer size for Console output */
34 #define CONFIG_SYS_MAXARGS		16	/* max args accepted for monitor commands */
35 #define CONFIG_SYS_BARGSIZE		512	/* Buffer size for Boot Arguments passed to kernel */
36 #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }	/* List of legal baudrate settings for this board */
37 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
38 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
39 #define CONFIG_SYS_MONITOR_LEN		(128 * 1024)
40 #define CONFIG_SYS_MALLOC_LEN		(256 * 1024)
41 
42 #define CONFIG_SYS_TEXT_BASE	0x8FFC0000
43 
44 /* Memory */
45 #define CONFIG_SYS_SDRAM_BASE		0x8C000000
46 #define CONFIG_SYS_SDRAM_SIZE		(64 * 1024 * 1024)
47 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
48 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
49 
50 /* Flash */
51 #define CONFIG_SYS_FLASH_CFI
52 #define CONFIG_FLASH_CFI_DRIVER
53 #define CONFIG_SYS_FLASH_EMPTY_INFO
54 #define CONFIG_SYS_FLASH_BASE		0xA0000000
55 #define CONFIG_SYS_MAX_FLASH_SECT	256
56 #define CONFIG_SYS_MAX_FLASH_BANKS	1
57 #define CONFIG_SYS_FLASH_BANKS_LIST	{ CONFIG_SYS_FLASH_BASE }
58 #define CONFIG_ENV_IS_IN_FLASH
59 #define CONFIG_ENV_SECT_SIZE	(128 * 1024)
60 #define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
61 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
62 #define CONFIG_SYS_FLASH_ERASE_TOUT	120000
63 #define CONFIG_SYS_FLASH_WRITE_TOUT	500
64 
65 /* Clocks */
66 #define CONFIG_SYS_CLK_FREQ	24000000
67 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
68 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
69 #define CONFIG_SYS_TMU_CLK_DIV		4	/* 4 (default), 16, 64, 256 or 1024 */
70 
71 /* UART */
72 #define CONFIG_SCIF_CONSOLE	1
73 #define CONFIG_CONS_SCIF0	1
74 
75 #endif	/* __MPR2_H */
76