1 /* 2 * Configuation settings for MPR2 3 * 4 * Copyright (C) 2008 5 * Mark Jonas <mark.jonas@de.bosch.com> 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26 #ifndef __MPR2_H 27 #define __MPR2_H 28 29 /* Supported commands */ 30 #define CONFIG_CMD_ENV 31 #define CONFIG_CMD_CACHE 32 #define CONFIG_CMD_MEMORY 33 #define CONFIG_CMD_FLASH 34 35 /* Default environment variables */ 36 #define CONFIG_BAUDRATE 115200 37 #define CONFIG_BOOTARGS "console=ttySC0,115200" 38 #define CONFIG_BOOTFILE /boot/zImage 39 #define CONFIG_LOADADDR 0x8E000000 40 #define CONFIG_VERSION_VARIABLE 41 42 /* CPU and platform */ 43 #define CONFIG_SH 1 44 #define CONFIG_SH3 1 45 #define CONFIG_CPU_SH7720 1 46 #define CONFIG_MPR2 1 47 48 /* U-Boot internals */ 49 #define CFG_LONGHELP /* undef to save memory */ 50 #define CFG_PROMPT "=> " /* Monitor Command Prompt */ 51 #define CFG_CBSIZE 256 /* Buffer size for input from the Console */ 52 #define CFG_PBSIZE 256 /* Buffer size for Console output */ 53 #define CFG_MAXARGS 16 /* max args accepted for monitor commands */ 54 #define CFG_BARGSIZE 512 /* Buffer size for Boot Arguments passed to kernel */ 55 #define CFG_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */ 56 #define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 32 * 1024 * 1024) 57 #define CFG_MONITOR_BASE CFG_FLASH_BASE 58 #define CFG_MONITOR_LEN (128 * 1024) 59 #define CFG_MALLOC_LEN (256 * 1024) 60 #define CFG_GBL_DATA_SIZE 256 61 62 /* Memory */ 63 #define CFG_SDRAM_BASE 0x8C000000 64 #define CFG_SDRAM_SIZE (64 * 1024 * 1024) 65 #define CFG_MEMTEST_START CFG_SDRAM_BASE 66 #define CFG_MEMTEST_END (CFG_MEMTEST_START + (60 * 1024 * 1024)) 67 68 /* Flash */ 69 #define CFG_FLASH_CFI 70 #define CONFIG_FLASH_CFI_DRIVER 71 #define CFG_FLASH_EMPTY_INFO 72 #define CFG_FLASH_BASE 0xA0000000 73 #define CFG_MAX_FLASH_SECT 256 74 #define CFG_MAX_FLASH_BANKS 1 75 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } 76 #define CFG_ENV_IS_IN_FLASH 77 #define CFG_ENV_SECT_SIZE (128 * 1024) 78 #define CFG_ENV_SIZE CFG_ENV_SECT_SIZE 79 #define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) 80 #define CFG_FLASH_ERASE_TOUT 120000 81 #define CFG_FLASH_WRITE_TOUT 500 82 83 /* Clocks */ 84 #define CONFIG_SYS_CLK_FREQ 24000000 85 #define TMU_CLK_DIVIDER 4 /* 4 (default), 16, 64, 256 or 1024 */ 86 #define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER) 87 88 /* UART */ 89 #define CONFIG_SCIF_CONSOLE 1 90 #define CONFIG_CONS_SCIF0 1 91 92 #endif /* __MPR2_H */ 93