1 /* 2 * Configuation settings for MPR2 3 * 4 * Copyright (C) 2008 5 * Mark Jonas <mark.jonas@de.bosch.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __MPR2_H 11 #define __MPR2_H 12 13 /* Supported commands */ 14 15 /* Default environment variables */ 16 #define CONFIG_BAUDRATE 115200 17 #define CONFIG_BOOTARGS "console=ttySC0,115200" 18 #define CONFIG_BOOTFILE "/boot/zImage" 19 #define CONFIG_LOADADDR 0x8E000000 20 21 /* CPU and platform */ 22 #define CONFIG_CPU_SH7720 1 23 #define CONFIG_MPR2 1 24 25 /* U-Boot internals */ 26 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 27 #define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */ 28 #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ 29 #define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */ 30 #define CONFIG_SYS_BARGSIZE 512 /* Buffer size for Boot Arguments passed to kernel */ 31 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */ 32 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024) 33 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 34 #define CONFIG_SYS_MONITOR_LEN (128 * 1024) 35 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 36 37 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 38 39 /* Memory */ 40 #define CONFIG_SYS_SDRAM_BASE 0x8C000000 41 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) 42 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 43 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) 44 45 /* Flash */ 46 #define CONFIG_SYS_FLASH_CFI 47 #define CONFIG_FLASH_CFI_DRIVER 48 #define CONFIG_SYS_FLASH_EMPTY_INFO 49 #define CONFIG_SYS_FLASH_BASE 0xA0000000 50 #define CONFIG_SYS_MAX_FLASH_SECT 256 51 #define CONFIG_SYS_MAX_FLASH_BANKS 1 52 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 53 #define CONFIG_ENV_IS_IN_FLASH 54 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 55 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 56 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 57 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 58 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 59 60 /* Clocks */ 61 #define CONFIG_SYS_CLK_FREQ 24000000 62 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 63 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 64 #define CONFIG_SYS_TMU_CLK_DIV 4 /* 4 (default), 16, 64, 256 or 1024 */ 65 66 /* UART */ 67 #define CONFIG_SCIF_CONSOLE 1 68 #define CONFIG_CONS_SCIF0 1 69 70 #endif /* __MPR2_H */ 71