1 /* 2 * (C) Copyright 2007-2010 Michal Simek 3 * 4 * Michal SIMEK <monstr@monstr.eu> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include "../board/xilinx/microblaze-generic/xparameters.h" 13 14 /* MicroBlaze CPU */ 15 #define MICROBLAZE_V5 1 16 17 /* linear and spi flash memory */ 18 #ifdef XILINX_FLASH_START 19 #define FLASH 20 #undef SPIFLASH 21 #undef RAMENV /* hold environment in flash */ 22 #else 23 #ifdef XILINX_SPI_FLASH_BASEADDR 24 #undef FLASH 25 #define SPIFLASH 26 #undef RAMENV /* hold environment in flash */ 27 #else 28 #undef FLASH 29 #undef SPIFLASH 30 #define RAMENV /* hold environment in RAM */ 31 #endif 32 #endif 33 34 /* uart */ 35 /* The following table includes the supported baudrates */ 36 # define CONFIG_SYS_BAUDRATE_TABLE \ 37 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 38 39 /* setting reset address */ 40 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ 41 42 /* gpio */ 43 #ifdef XILINX_GPIO_BASEADDR 44 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR 45 #endif 46 47 /* watchdog */ 48 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ) 49 # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR 50 # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ 51 # ifndef CONFIG_SPL_BUILD 52 # define CONFIG_HW_WATCHDOG 53 # define CONFIG_XILINX_TB_WATCHDOG 54 # endif 55 #endif 56 57 #define CONFIG_SYS_MALLOC_LEN 0xC0000 58 59 /* Stack location before relocation */ 60 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \ 61 CONFIG_SYS_MALLOC_F_LEN) 62 63 /* 64 * CFI flash memory layout - Example 65 * CONFIG_SYS_FLASH_BASE = 0x2200_0000; 66 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB 67 * 68 * SECT_SIZE = 0x20000; 128kB is one sector 69 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store 70 * 71 * 0x2200_0000 CONFIG_SYS_FLASH_BASE 72 * FREE 256kB 73 * 0x2204_0000 CONFIG_ENV_ADDR 74 * ENV_AREA 128kB 75 * 0x2206_0000 76 * FREE 77 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE 78 * 79 */ 80 81 #ifdef FLASH 82 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START 83 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE 84 # define CONFIG_SYS_FLASH_CFI 1 85 # define CONFIG_FLASH_CFI_DRIVER 1 86 /* ?empty sector */ 87 # define CONFIG_SYS_FLASH_EMPTY_INFO 1 88 /* max number of memory banks */ 89 # define CONFIG_SYS_MAX_FLASH_BANKS 1 90 /* max number of sectors on one chip */ 91 # define CONFIG_SYS_MAX_FLASH_SECT 512 92 /* hardware flash protection */ 93 # define CONFIG_SYS_FLASH_PROTECTION 94 /* use buffered writes (20x faster) */ 95 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 96 # ifdef RAMENV 97 # define CONFIG_ENV_SIZE 0x1000 98 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 99 100 # else /* FLASH && !RAMENV */ 101 /* 128K(one sector) for env */ 102 # define CONFIG_ENV_SECT_SIZE 0x20000 103 # define CONFIG_ENV_ADDR \ 104 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) 105 # define CONFIG_ENV_SIZE 0x20000 106 # endif /* FLASH && !RAMBOOT */ 107 #else /* !FLASH */ 108 109 #ifdef SPIFLASH 110 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR 111 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 112 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ 113 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS 114 115 # ifdef RAMENV 116 # define CONFIG_ENV_SIZE 0x1000 117 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 118 119 # else /* SPIFLASH && !RAMENV */ 120 # define CONFIG_ENV_SPI_MODE SPI_MODE_3 121 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 122 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 123 /* 128K(two sectors) for env */ 124 # define CONFIG_ENV_SECT_SIZE 0x10000 125 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE) 126 /* Warning: adjust the offset in respect of other flash content and size */ 127 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */ 128 # endif /* SPIFLASH && !RAMBOOT */ 129 #else /* !SPIFLASH */ 130 131 /* ENV in RAM */ 132 # define CONFIG_ENV_SIZE 0x1000 133 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 134 #endif /* !SPIFLASH */ 135 #endif /* !FLASH */ 136 137 #if defined(XILINX_USE_ICACHE) 138 # define CONFIG_ICACHE 139 #else 140 # undef CONFIG_ICACHE 141 #endif 142 143 #if defined(XILINX_USE_DCACHE) 144 # define CONFIG_DCACHE 145 #else 146 # undef CONFIG_DCACHE 147 #endif 148 149 #ifndef XILINX_DCACHE_BYTE_SIZE 150 #define XILINX_DCACHE_BYTE_SIZE 32768 151 #endif 152 153 /* 154 * BOOTP options 155 */ 156 #define CONFIG_BOOTP_BOOTFILESIZE 157 158 #if defined(CONFIG_CMD_JFFS2) 159 # define CONFIG_MTD_PARTITIONS 160 #endif 161 162 #if defined(CONFIG_CMD_UBI) 163 # define CONFIG_MTD_PARTITIONS 164 #endif 165 166 #if defined(CONFIG_MTD_PARTITIONS) 167 /* MTD partitions */ 168 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 169 #define CONFIG_FLASH_CFI_MTD 170 171 /* default mtd partition table */ 172 #endif 173 174 /* size of console buffer */ 175 #define CONFIG_SYS_CBSIZE 512 176 /* max number of command args */ 177 #define CONFIG_SYS_MAXARGS 15 178 /* default load address */ 179 #define CONFIG_SYS_LOAD_ADDR 0 180 181 #define CONFIG_HOSTNAME "microblaze-generic" 182 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" 183 184 /* architecture dependent code */ 185 #define CONFIG_SYS_USR_EXCEP /* user exception */ 186 187 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" 188 189 #ifndef CONFIG_EXTRA_ENV_SETTINGS 190 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \ 191 "nor0=flash-0\0"\ 192 "mtdparts=mtdparts=flash-0:"\ 193 "256k(u-boot),256k(env),3m(kernel),"\ 194 "1m(romfs),1m(cramfs),-(jffs2)\0"\ 195 "nc=setenv stdout nc;"\ 196 "setenv stdin nc\0" \ 197 "serial=setenv stdout serial;"\ 198 "setenv stdin serial\0" 199 #endif 200 201 /* Enable flat device tree support */ 202 #define CONFIG_LMB 1 203 204 #if defined(CONFIG_XILINX_AXIEMAC) 205 # define CONFIG_MII 1 206 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 207 #else 208 # undef CONFIG_MII 209 #endif 210 211 /* SPL part */ 212 213 #ifdef CONFIG_SYS_FLASH_BASE 214 # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE 215 #endif 216 217 /* for booting directly linux */ 218 219 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ 220 0x40000) 221 #define CONFIG_SYS_FDT_SIZE (16<<10) 222 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \ 223 0x1000000) 224 225 /* SP location before relocation, must use scratch RAM */ 226 /* BRAM start */ 227 #define CONFIG_SYS_INIT_RAM_ADDR 0x0 228 /* BRAM size - will be generated */ 229 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000 230 231 # define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 232 CONFIG_SYS_INIT_RAM_SIZE - \ 233 CONFIG_SYS_MALLOC_F_LEN) 234 235 /* Just for sure that there is a space for stack */ 236 #define CONFIG_SPL_STACK_SIZE 0x100 237 238 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 239 240 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \ 241 CONFIG_SYS_INIT_RAM_ADDR - \ 242 CONFIG_SYS_MALLOC_F_LEN - \ 243 CONFIG_SPL_STACK_SIZE) 244 245 #endif /* __CONFIG_H */ 246