1 /* 2 * (C) Copyright 2007-2010 Michal Simek 3 * 4 * Michal SIMEK <monstr@monstr.eu> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include "../board/xilinx/microblaze-generic/xparameters.h" 13 14 /* MicroBlaze CPU */ 15 #define MICROBLAZE_V5 1 16 17 /* linear and spi flash memory */ 18 #ifdef XILINX_FLASH_START 19 #define FLASH 20 #undef SPIFLASH 21 #undef RAMENV /* hold environment in flash */ 22 #else 23 #ifdef XILINX_SPI_FLASH_BASEADDR 24 #undef FLASH 25 #define SPIFLASH 26 #undef RAMENV /* hold environment in flash */ 27 #else 28 #undef FLASH 29 #undef SPIFLASH 30 #define RAMENV /* hold environment in RAM */ 31 #endif 32 #endif 33 34 /* uart */ 35 #ifdef XILINX_UARTLITE_BASEADDR 36 # define CONFIG_XILINX_UARTLITE 37 # define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR 38 # define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE 39 # define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } 40 # define CONSOLE_ARG "console=console=ttyUL0,115200\0" 41 #elif XILINX_UART16550_BASEADDR 42 # define CONFIG_SYS_NS16550 1 43 # define CONFIG_SYS_NS16550_SERIAL 44 # if defined(__MICROBLAZEEL__) 45 # define CONFIG_SYS_NS16550_REG_SIZE -4 46 # else 47 # define CONFIG_SYS_NS16550_REG_SIZE 4 48 # endif 49 # define CONFIG_CONS_INDEX 1 50 # define CONFIG_SYS_NS16550_COM1 \ 51 ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000) 52 # define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ 53 # define CONFIG_BAUDRATE 115200 54 55 /* The following table includes the supported baudrates */ 56 # define CONFIG_SYS_BAUDRATE_TABLE \ 57 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 58 # define CONSOLE_ARG "console=console=ttyS0,115200\0" 59 #else 60 # error Undefined uart 61 #endif 62 63 /* setting reset address */ 64 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ 65 66 /* ethernet */ 67 #undef CONFIG_SYS_ENET 68 #if defined(XILINX_EMACLITE_BASEADDR) || defined(CONFIG_OF_CONTROL) 69 # define CONFIG_XILINX_EMACLITE 1 70 # define CONFIG_SYS_ENET 71 #endif 72 #if defined(XILINX_LLTEMAC_BASEADDR) 73 # define CONFIG_XILINX_LL_TEMAC 1 74 # define CONFIG_SYS_ENET 75 #endif 76 #if defined(XILINX_AXIEMAC_BASEADDR) 77 # define CONFIG_XILINX_AXIEMAC 1 78 # define CONFIG_SYS_ENET 79 #endif 80 81 #undef ET_DEBUG 82 83 /* gpio */ 84 #ifdef XILINX_GPIO_BASEADDR 85 # define CONFIG_XILINX_GPIO 86 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR 87 #endif 88 89 /* interrupt controller */ 90 #ifdef XILINX_INTC_BASEADDR 91 # define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR 92 # define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS 93 #endif 94 95 /* timer */ 96 #if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ) 97 # define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR 98 # define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ 99 #endif 100 101 /* watchdog */ 102 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ) 103 # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR 104 # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ 105 # define CONFIG_HW_WATCHDOG 106 # define CONFIG_XILINX_TB_WATCHDOG 107 #endif 108 109 #ifndef CONFIG_OF_CONTROL 110 /* ddr sdram - main memory */ 111 # define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START 112 # define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE 113 #endif 114 115 #define CONFIG_SYS_MALLOC_LEN 0xC0000 116 117 /* Stack location before relocation */ 118 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_TEXT_BASE 119 120 /* 121 * CFI flash memory layout - Example 122 * CONFIG_SYS_FLASH_BASE = 0x2200_0000; 123 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB 124 * 125 * SECT_SIZE = 0x20000; 128kB is one sector 126 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store 127 * 128 * 0x2200_0000 CONFIG_SYS_FLASH_BASE 129 * FREE 256kB 130 * 0x2204_0000 CONFIG_ENV_ADDR 131 * ENV_AREA 128kB 132 * 0x2206_0000 133 * FREE 134 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE 135 * 136 */ 137 138 #ifdef FLASH 139 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START 140 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE 141 # define CONFIG_SYS_FLASH_CFI 1 142 # define CONFIG_FLASH_CFI_DRIVER 1 143 /* ?empty sector */ 144 # define CONFIG_SYS_FLASH_EMPTY_INFO 1 145 /* max number of memory banks */ 146 # define CONFIG_SYS_MAX_FLASH_BANKS 1 147 /* max number of sectors on one chip */ 148 # define CONFIG_SYS_MAX_FLASH_SECT 512 149 /* hardware flash protection */ 150 # define CONFIG_SYS_FLASH_PROTECTION 151 /* use buffered writes (20x faster) */ 152 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 153 # ifdef RAMENV 154 # define CONFIG_ENV_IS_NOWHERE 1 155 # define CONFIG_ENV_SIZE 0x1000 156 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 157 158 # else /* FLASH && !RAMENV */ 159 # define CONFIG_ENV_IS_IN_FLASH 1 160 /* 128K(one sector) for env */ 161 # define CONFIG_ENV_SECT_SIZE 0x20000 162 # define CONFIG_ENV_ADDR \ 163 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) 164 # define CONFIG_ENV_SIZE 0x20000 165 # endif /* FLASH && !RAMBOOT */ 166 #else /* !FLASH */ 167 168 #ifdef SPIFLASH 169 # define CONFIG_SYS_NO_FLASH 1 170 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR 171 # define CONFIG_XILINX_SPI 1 172 # define CONFIG_SPI 1 173 # define CONFIG_SPI_FLASH 1 174 # define CONFIG_SPI_FLASH_STMICRO 1 175 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 176 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ 177 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS 178 179 # ifdef RAMENV 180 # define CONFIG_ENV_IS_NOWHERE 1 181 # define CONFIG_ENV_SIZE 0x1000 182 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 183 184 # else /* SPIFLASH && !RAMENV */ 185 # define CONFIG_ENV_IS_IN_SPI_FLASH 1 186 # define CONFIG_ENV_SPI_MODE SPI_MODE_3 187 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 188 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 189 /* 128K(two sectors) for env */ 190 # define CONFIG_ENV_SECT_SIZE 0x10000 191 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE) 192 /* Warning: adjust the offset in respect of other flash content and size */ 193 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */ 194 # endif /* SPIFLASH && !RAMBOOT */ 195 #else /* !SPIFLASH */ 196 197 /* ENV in RAM */ 198 # define CONFIG_SYS_NO_FLASH 1 199 # define CONFIG_ENV_IS_NOWHERE 1 200 # define CONFIG_ENV_SIZE 0x1000 201 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 202 #endif /* !SPIFLASH */ 203 #endif /* !FLASH */ 204 205 /* system ace */ 206 #ifdef XILINX_SYSACE_BASEADDR 207 # define CONFIG_SYSTEMACE 208 /* #define DEBUG_SYSTEMACE */ 209 # define SYSTEMACE_CONFIG_FPGA 210 # define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR 211 # define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH 212 # define CONFIG_DOS_PARTITION 213 #endif 214 215 #if defined(XILINX_USE_ICACHE) 216 # define CONFIG_ICACHE 217 #else 218 # undef CONFIG_ICACHE 219 #endif 220 221 #if defined(XILINX_USE_DCACHE) 222 # define CONFIG_DCACHE 223 #else 224 # undef CONFIG_DCACHE 225 #endif 226 227 #ifndef XILINX_DCACHE_BYTE_SIZE 228 #define XILINX_DCACHE_BYTE_SIZE 32768 229 #endif 230 231 /* 232 * BOOTP options 233 */ 234 #define CONFIG_BOOTP_BOOTFILESIZE 235 #define CONFIG_BOOTP_BOOTPATH 236 #define CONFIG_BOOTP_GATEWAY 237 #define CONFIG_BOOTP_HOSTNAME 238 239 /* 240 * Command line configuration. 241 */ 242 #include <config_cmd_default.h> 243 244 #define CONFIG_CMD_ASKENV 245 #define CONFIG_CMD_IRQ 246 #define CONFIG_CMD_MFSL 247 #define CONFIG_CMD_ECHO 248 #define CONFIG_CMD_GPIO 249 250 #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE) 251 # define CONFIG_CMD_CACHE 252 #else 253 # undef CONFIG_CMD_CACHE 254 #endif 255 256 #ifndef CONFIG_SYS_ENET 257 # undef CONFIG_CMD_NET 258 # undef CONFIG_CMD_NFS 259 #else 260 # define CONFIG_CMD_PING 261 # define CONFIG_CMD_DHCP 262 # define CONFIG_CMD_TFTPPUT 263 #endif 264 265 #if defined(CONFIG_SYSTEMACE) 266 # define CONFIG_CMD_EXT2 267 # define CONFIG_CMD_FAT 268 #endif 269 270 #if defined(FLASH) 271 # define CONFIG_CMD_ECHO 272 # define CONFIG_CMD_FLASH 273 # define CONFIG_CMD_IMLS 274 # define CONFIG_CMD_JFFS2 275 # define CONFIG_CMD_UBI 276 # undef CONFIG_CMD_UBIFS 277 278 # if !defined(RAMENV) 279 # define CONFIG_CMD_SAVEENV 280 # define CONFIG_CMD_SAVES 281 # endif 282 283 #else 284 #if defined(SPIFLASH) 285 # define CONFIG_CMD_SF 286 287 # if !defined(RAMENV) 288 # define CONFIG_CMD_SAVEENV 289 # define CONFIG_CMD_SAVES 290 # endif 291 #else 292 # undef CONFIG_CMD_IMLS 293 # undef CONFIG_CMD_FLASH 294 # undef CONFIG_CMD_JFFS2 295 # undef CONFIG_CMD_UBI 296 # undef CONFIG_CMD_UBIFS 297 #endif 298 #endif 299 300 #if defined(CONFIG_CMD_JFFS2) 301 # define CONFIG_MTD_PARTITIONS 302 #endif 303 304 #if defined(CONFIG_CMD_UBIFS) 305 # define CONFIG_CMD_UBI 306 # define CONFIG_LZO 307 #endif 308 309 #if defined(CONFIG_CMD_UBI) 310 # define CONFIG_MTD_PARTITIONS 311 # define CONFIG_RBTREE 312 #endif 313 314 #if defined(CONFIG_MTD_PARTITIONS) 315 /* MTD partitions */ 316 #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */ 317 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 318 #define CONFIG_FLASH_CFI_MTD 319 #define MTDIDS_DEFAULT "nor0=flash-0" 320 321 /* default mtd partition table */ 322 #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\ 323 "256k(env),3m(kernel),1m(romfs),"\ 324 "1m(cramfs),-(jffs2)" 325 #endif 326 327 /* Miscellaneous configurable options */ 328 #define CONFIG_SYS_PROMPT "U-Boot-mONStR> " 329 /* size of console buffer */ 330 #define CONFIG_SYS_CBSIZE 512 331 /* print buffer size */ 332 #define CONFIG_SYS_PBSIZE \ 333 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 334 /* max number of command args */ 335 #define CONFIG_SYS_MAXARGS 15 336 #define CONFIG_SYS_LONGHELP 337 /* default load address */ 338 #define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START 339 340 #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */ 341 #define CONFIG_BOOTARGS "root=romfs" 342 #define CONFIG_HOSTNAME XILINX_BOARD_NAME 343 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" 344 #define CONFIG_IPADDR 192.168.0.3 345 #define CONFIG_SERVERIP 192.168.0.5 346 #define CONFIG_GATEWAYIP 192.168.0.1 347 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD 348 349 /* architecture dependent code */ 350 #define CONFIG_SYS_USR_EXCEP /* user exception */ 351 352 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" 353 354 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \ 355 "nor0=flash-0\0"\ 356 "mtdparts=mtdparts=flash-0:"\ 357 "256k(u-boot),256k(env),3m(kernel),"\ 358 "1m(romfs),1m(cramfs),-(jffs2)\0"\ 359 "nc=setenv stdout nc;"\ 360 "setenv stdin nc\0" \ 361 "serial=setenv stdout serial;"\ 362 "setenv stdin serial\0" 363 364 #define CONFIG_CMDLINE_EDITING 365 366 #define CONFIG_NETCONSOLE 367 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 368 369 /* Use the HUSH parser */ 370 #define CONFIG_SYS_HUSH_PARSER 371 372 /* Enable flat device tree support */ 373 #define CONFIG_LMB 1 374 #define CONFIG_FIT 1 375 #define CONFIG_OF_LIBFDT 1 376 377 #if defined(CONFIG_XILINX_LL_TEMAC) || defined(CONFIG_XILINX_AXIEMAC) 378 # define CONFIG_MII 1 379 # define CONFIG_CMD_MII 1 380 # define CONFIG_PHY_GIGE 1 381 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 382 # define CONFIG_PHYLIB 1 383 # define CONFIG_PHY_ATHEROS 1 384 # define CONFIG_PHY_BROADCOM 1 385 # define CONFIG_PHY_DAVICOM 1 386 # define CONFIG_PHY_LXT 1 387 # define CONFIG_PHY_MARVELL 1 388 # define CONFIG_PHY_MICREL 1 389 # define CONFIG_PHY_NATSEMI 1 390 # define CONFIG_PHY_REALTEK 1 391 # define CONFIG_PHY_VITESSE 1 392 #else 393 # undef CONFIG_MII 394 # undef CONFIG_CMD_MII 395 # undef CONFIG_PHYLIB 396 #endif 397 398 /* SPL part */ 399 #define CONFIG_CMD_SPL 400 #define CONFIG_SPL_FRAMEWORK 401 #define CONFIG_SPL_LIBCOMMON_SUPPORT 402 #define CONFIG_SPL_LIBGENERIC_SUPPORT 403 #define CONFIG_SPL_SERIAL_SUPPORT 404 #define CONFIG_SPL_BOARD_INIT 405 406 #define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds" 407 408 #define CONFIG_SPL_RAM_DEVICE 409 #ifdef CONFIG_SYS_FLASH_BASE 410 # define CONFIG_SPL_NOR_SUPPORT 411 # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE 412 #endif 413 414 /* for booting directly linux */ 415 #define CONFIG_SPL_OS_BOOT 416 417 #define CONFIG_SYS_OS_BASE (CONFIG_SYS_FLASH_BASE + \ 418 0x60000) 419 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ 420 0x40000) 421 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \ 422 0x1000000) 423 424 /* SP location before relocation, must use scratch RAM */ 425 /* BRAM start */ 426 #define CONFIG_SYS_INIT_RAM_ADDR 0x0 427 /* BRAM size - will be generated */ 428 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 429 /* Stack pointer prior relocation, must situated at on-chip RAM */ 430 #define CONFIG_SYS_SPL_MALLOC_END (CONFIG_SYS_INIT_RAM_ADDR + \ 431 CONFIG_SYS_INIT_RAM_SIZE - \ 432 GENERATED_GBL_DATA_SIZE) 433 434 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100 435 436 /* 437 * The main reason to do it in this way is that MALLOC_START 438 * can't be defined - common/spl/spl.c 439 */ 440 #if (CONFIG_SYS_SPL_MALLOC_SIZE != 0) 441 # define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_SPL_MALLOC_END - \ 442 CONFIG_SYS_SPL_MALLOC_SIZE) 443 # define CONFIG_SPL_STACK_ADDR CONFIG_SYS_SPL_MALLOC_START 444 #else 445 # define CONFIG_SPL_STACK_ADDR CONFIG_SYS_SPL_MALLOC_END 446 #endif 447 448 /* Just for sure that there is a space for stack */ 449 #define CONFIG_SPL_STACK_SIZE 0x100 450 451 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 452 453 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \ 454 CONFIG_SYS_INIT_RAM_ADDR - \ 455 GENERATED_GBL_DATA_SIZE - \ 456 CONFIG_SYS_SPL_MALLOC_SIZE - \ 457 CONFIG_SPL_STACK_SIZE) 458 459 #endif /* __CONFIG_H */ 460