1 /* 2 * (C) Copyright 2007-2008 Michal Simek 3 * 4 * Michal SIMEK <monstr@monstr.eu> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 #ifndef __CONFIG_H 26 #define __CONFIG_H 27 28 #include "../board/xilinx/microblaze-generic/xparameters.h" 29 30 #define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */ 31 #define MICROBLAZE_V5 1 32 33 /* uart */ 34 #ifdef XILINX_UARTLITE_BASEADDR 35 #define CONFIG_XILINX_UARTLITE 36 #define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR 37 #define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE 38 #define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } 39 #define CONSOLE_ARG "console=console=ttyUL0,115200\0" 40 #elif XILINX_UART16550_BASEADDR 41 #define CONFIG_SYS_NS16550 1 42 #define CONFIG_SYS_NS16550_SERIAL 43 #define CONFIG_SYS_NS16550_REG_SIZE -4 44 #define CONFIG_CONS_INDEX 1 45 #define CONFIG_SYS_NS16550_COM1 (XILINX_UART16550_BASEADDR + 0x1000 + 0x3) 46 #define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ 47 #define CONFIG_BAUDRATE 115200 48 49 /* The following table includes the supported baudrates */ 50 #define CONFIG_SYS_BAUDRATE_TABLE \ 51 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 52 #define CONSOLE_ARG "console=console=ttyS0,115200\0" 53 #else 54 #error Undefined uart 55 #endif 56 57 /* setting reset address */ 58 /*#define CONFIG_SYS_RESET_ADDRESS TEXT_BASE*/ 59 60 /* ethernet */ 61 #ifdef XILINX_EMACLITE_BASEADDR 62 #define CONFIG_XILINX_EMACLITE 1 63 #define CONFIG_SYS_ENET 64 #elif XILINX_LLTEMAC_BASEADDR 65 #define CONFIG_XILINX_LL_TEMAC 1 66 #define CONFIG_SYS_ENET 67 #endif 68 69 #undef ET_DEBUG 70 71 /* gpio */ 72 #ifdef XILINX_GPIO_BASEADDR 73 #define CONFIG_SYS_GPIO_0 1 74 #define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR 75 #endif 76 77 /* interrupt controller */ 78 #ifdef XILINX_INTC_BASEADDR 79 #define CONFIG_SYS_INTC_0 1 80 #define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR 81 #define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS 82 #endif 83 84 /* timer */ 85 #ifdef XILINX_TIMER_BASEADDR 86 #if (XILINX_TIMER_IRQ != -1) 87 #define CONFIG_SYS_TIMER_0 1 88 #define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR 89 #define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ 90 #define FREQUENCE XILINX_CLOCK_FREQ 91 #define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 ) 92 #endif 93 #elif XILINX_CLOCK_FREQ 94 #define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ 95 #else 96 #error BAD CLOCK FREQ 97 #endif 98 /* FSL */ 99 /* #define CONFIG_SYS_FSL_2 */ 100 /* #define FSL_INTR_2 1 */ 101 102 /* 103 * memory layout - Example 104 * TEXT_BASE = 0x1200_0000; 105 * CONFIG_SYS_SRAM_BASE = 0x1000_0000; 106 * CONFIG_SYS_SRAM_SIZE = 0x0400_0000; 107 * 108 * CONFIG_SYS_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000 109 * CONFIG_SYS_MONITOR_BASE = 0x13FF_F000 - 0x40000 = 0x13FB_F000 110 * CONFIG_SYS_MALLOC_BASE = 0x13FB_F000 - 0x40000 = 0x13F7_F000 111 * 112 * 0x1000_0000 CONFIG_SYS_SDRAM_BASE 113 * FREE 114 * 0x1200_0000 TEXT_BASE 115 * U-BOOT code 116 * 0x1202_0000 117 * FREE 118 * 119 * STACK 120 * 0x13F7_F000 CONFIG_SYS_MALLOC_BASE 121 * MALLOC_AREA 256kB Alloc 122 * 0x11FB_F000 CONFIG_SYS_MONITOR_BASE 123 * MONITOR_CODE 256kB Env 124 * 0x13FF_F000 CONFIG_SYS_GBL_DATA_OFFSET 125 * GLOBAL_DATA 4kB bd, gd 126 * 0x1400_0000 CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE 127 */ 128 129 /* ddr sdram - main memory */ 130 #define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START 131 #define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE 132 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 133 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) 134 135 /* global pointer */ 136 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size of global data */ 137 /* start of global data */ 138 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE) 139 140 /* monitor code */ 141 #define SIZE 0x40000 142 #define CONFIG_SYS_MONITOR_LEN (SIZE - CONFIG_SYS_GBL_DATA_SIZE) 143 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN) 144 #define CONFIG_SYS_MONITOR_END (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 145 #define CONFIG_SYS_MALLOC_LEN SIZE 146 #define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) 147 148 /* stack */ 149 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MONITOR_BASE 150 151 /*#define RAMENV */ 152 #define FLASH 153 154 #ifdef FLASH 155 #define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START 156 #define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE 157 #define CONFIG_SYS_FLASH_CFI 1 158 #define CONFIG_FLASH_CFI_DRIVER 1 159 #define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* ?empty sector */ 160 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 161 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ 162 #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */ 163 164 #ifdef RAMENV 165 #define CONFIG_ENV_IS_NOWHERE 1 166 #define CONFIG_ENV_SIZE 0x1000 167 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 168 169 #else /* !RAMENV */ 170 #define CONFIG_ENV_IS_IN_FLASH 1 171 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ 172 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) 173 #define CONFIG_ENV_SIZE 0x20000 174 #endif /* !RAMBOOT */ 175 #else /* !FLASH */ 176 /* ENV in RAM */ 177 #define CONFIG_SYS_NO_FLASH 1 178 #define CONFIG_ENV_IS_NOWHERE 1 179 #define CONFIG_ENV_SIZE 0x1000 180 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 181 #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */ 182 #endif /* !FLASH */ 183 184 /* system ace */ 185 #ifdef XILINX_SYSACE_BASEADDR 186 #define CONFIG_SYSTEMACE 187 /* #define DEBUG_SYSTEMACE */ 188 #define SYSTEMACE_CONFIG_FPGA 189 #define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR 190 #define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH 191 #define CONFIG_DOS_PARTITION 192 #endif 193 194 #if defined(XILINX_USE_ICACHE) 195 #define CONFIG_ICACHE 196 #else 197 #undef CONFIG_ICACHE 198 #endif 199 200 #if defined(XILINX_USE_DCACHE) 201 #define CONFIG_DCACHE 202 #else 203 #undef CONFIG_DCACHE 204 #endif 205 206 /* 207 * BOOTP options 208 */ 209 #define CONFIG_BOOTP_BOOTFILESIZE 210 #define CONFIG_BOOTP_BOOTPATH 211 #define CONFIG_BOOTP_GATEWAY 212 #define CONFIG_BOOTP_HOSTNAME 213 214 /* 215 * Command line configuration. 216 */ 217 #include <config_cmd_default.h> 218 219 #define CONFIG_CMD_ASKENV 220 #define CONFIG_CMD_IRQ 221 #define CONFIG_CMD_MFSL 222 #define CONFIG_CMD_ECHO 223 224 #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE) 225 #define CONFIG_CMD_CACHE 226 #else 227 #undef CONFIG_CMD_CACHE 228 #endif 229 230 #ifndef CONFIG_SYS_ENET 231 #undef CONFIG_CMD_NET 232 #else 233 #define CONFIG_CMD_PING 234 #endif 235 236 #if defined(CONFIG_SYSTEMACE) 237 #define CONFIG_CMD_EXT2 238 #define CONFIG_CMD_FAT 239 #endif 240 241 #if defined(FLASH) 242 #define CONFIG_CMD_ECHO 243 #define CONFIG_CMD_FLASH 244 #define CONFIG_CMD_IMLS 245 #define CONFIG_CMD_JFFS2 246 247 #if !defined(RAMENV) 248 #define CONFIG_CMD_SAVEENV 249 #define CONFIG_CMD_SAVES 250 #endif 251 #else 252 #undef CONFIG_CMD_IMLS 253 #undef CONFIG_CMD_FLASH 254 #undef CONFIG_CMD_JFFS2 255 #endif 256 257 #if defined(CONFIG_CMD_JFFS2) 258 /* JFFS2 partitions */ 259 #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */ 260 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 261 #define CONFIG_FLASH_CFI_MTD 262 #define MTDIDS_DEFAULT "nor0=ml401-0" 263 264 /* default mtd partition table */ 265 #define MTDPARTS_DEFAULT "mtdparts=ml401-0:256k(u-boot),"\ 266 "256k(env),3m(kernel),1m(romfs),"\ 267 "1m(cramfs),-(jffs2)" 268 #endif 269 270 /* Miscellaneous configurable options */ 271 #define CONFIG_SYS_PROMPT "U-Boot-mONStR> " 272 #define CONFIG_SYS_CBSIZE 512 /* size of console buffer */ 273 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */ 274 #define CONFIG_SYS_MAXARGS 15 /* max number of command args */ 275 #define CONFIG_SYS_LONGHELP 276 #define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START /* default load address */ 277 278 #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */ 279 #define CONFIG_BOOTARGS "root=romfs" 280 #define CONFIG_HOSTNAME XILINX_BOARD_NAME 281 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" 282 #define CONFIG_IPADDR 192.168.0.3 283 #define CONFIG_SERVERIP 192.168.0.5 284 #define CONFIG_GATEWAYIP 192.168.0.1 285 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD 286 287 /* architecture dependent code */ 288 #define CONFIG_SYS_USR_EXCEP /* user exception */ 289 #define CONFIG_SYS_HZ 1000 290 291 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" 292 293 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\ 294 "nor0=ml401-0\0"\ 295 "mtdparts=mtdparts=ml401-0:"\ 296 "256k(u-boot),256k(env),3m(kernel),"\ 297 "1m(romfs),1m(cramfs),-(jffs2)\0" 298 299 #define CONFIG_CMDLINE_EDITING 300 301 /* Use the HUSH parser */ 302 #define CONFIG_SYS_HUSH_PARSER 303 #ifdef CONFIG_SYS_HUSH_PARSER 304 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 305 #endif 306 307 #endif /* __CONFIG_H */ 308