1 /* 2 * (C) Copyright 2007-2010 Michal Simek 3 * 4 * Michal SIMEK <monstr@monstr.eu> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include "../board/xilinx/microblaze-generic/xparameters.h" 13 14 /* MicroBlaze CPU */ 15 #define MICROBLAZE_V5 1 16 17 /* linear and spi flash memory */ 18 #ifdef XILINX_FLASH_START 19 #define FLASH 20 #undef SPIFLASH 21 #undef RAMENV /* hold environment in flash */ 22 #else 23 #ifdef XILINX_SPI_FLASH_BASEADDR 24 #undef FLASH 25 #define SPIFLASH 26 #undef RAMENV /* hold environment in flash */ 27 #else 28 #undef FLASH 29 #undef SPIFLASH 30 #define RAMENV /* hold environment in RAM */ 31 #endif 32 #endif 33 34 /* uart */ 35 # define CONFIG_BAUDRATE 115200 36 /* The following table includes the supported baudrates */ 37 # define CONFIG_SYS_BAUDRATE_TABLE \ 38 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 39 40 /* setting reset address */ 41 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ 42 43 /* gpio */ 44 #ifdef XILINX_GPIO_BASEADDR 45 # define CONFIG_XILINX_GPIO 46 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR 47 #endif 48 49 /* watchdog */ 50 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ) 51 # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR 52 # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ 53 # ifndef CONFIG_SPL_BUILD 54 # define CONFIG_HW_WATCHDOG 55 # define CONFIG_XILINX_TB_WATCHDOG 56 # endif 57 #endif 58 59 #define CONFIG_SYS_MALLOC_LEN 0xC0000 60 61 /* Stack location before relocation */ 62 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \ 63 CONFIG_SYS_MALLOC_F_LEN) 64 65 /* 66 * CFI flash memory layout - Example 67 * CONFIG_SYS_FLASH_BASE = 0x2200_0000; 68 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB 69 * 70 * SECT_SIZE = 0x20000; 128kB is one sector 71 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store 72 * 73 * 0x2200_0000 CONFIG_SYS_FLASH_BASE 74 * FREE 256kB 75 * 0x2204_0000 CONFIG_ENV_ADDR 76 * ENV_AREA 128kB 77 * 0x2206_0000 78 * FREE 79 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE 80 * 81 */ 82 83 #ifdef FLASH 84 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START 85 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE 86 # define CONFIG_SYS_FLASH_CFI 1 87 # define CONFIG_FLASH_CFI_DRIVER 1 88 /* ?empty sector */ 89 # define CONFIG_SYS_FLASH_EMPTY_INFO 1 90 /* max number of memory banks */ 91 # define CONFIG_SYS_MAX_FLASH_BANKS 1 92 /* max number of sectors on one chip */ 93 # define CONFIG_SYS_MAX_FLASH_SECT 512 94 /* hardware flash protection */ 95 # define CONFIG_SYS_FLASH_PROTECTION 96 /* use buffered writes (20x faster) */ 97 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 98 # ifdef RAMENV 99 # define CONFIG_ENV_IS_NOWHERE 1 100 # define CONFIG_ENV_SIZE 0x1000 101 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 102 103 # else /* FLASH && !RAMENV */ 104 # define CONFIG_ENV_IS_IN_FLASH 1 105 /* 128K(one sector) for env */ 106 # define CONFIG_ENV_SECT_SIZE 0x20000 107 # define CONFIG_ENV_ADDR \ 108 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) 109 # define CONFIG_ENV_SIZE 0x20000 110 # endif /* FLASH && !RAMBOOT */ 111 #else /* !FLASH */ 112 113 #ifdef SPIFLASH 114 # define CONFIG_SYS_NO_FLASH 1 115 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR 116 # define CONFIG_SPI 1 117 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 118 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ 119 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS 120 121 # ifdef RAMENV 122 # define CONFIG_ENV_IS_NOWHERE 1 123 # define CONFIG_ENV_SIZE 0x1000 124 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 125 126 # else /* SPIFLASH && !RAMENV */ 127 # define CONFIG_ENV_IS_IN_SPI_FLASH 1 128 # define CONFIG_ENV_SPI_MODE SPI_MODE_3 129 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 130 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 131 /* 128K(two sectors) for env */ 132 # define CONFIG_ENV_SECT_SIZE 0x10000 133 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE) 134 /* Warning: adjust the offset in respect of other flash content and size */ 135 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */ 136 # endif /* SPIFLASH && !RAMBOOT */ 137 #else /* !SPIFLASH */ 138 139 /* ENV in RAM */ 140 # define CONFIG_SYS_NO_FLASH 1 141 # define CONFIG_ENV_IS_NOWHERE 1 142 # define CONFIG_ENV_SIZE 0x1000 143 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 144 #endif /* !SPIFLASH */ 145 #endif /* !FLASH */ 146 147 #if defined(XILINX_USE_ICACHE) 148 # define CONFIG_ICACHE 149 #else 150 # undef CONFIG_ICACHE 151 #endif 152 153 #if defined(XILINX_USE_DCACHE) 154 # define CONFIG_DCACHE 155 #else 156 # undef CONFIG_DCACHE 157 #endif 158 159 #ifndef XILINX_DCACHE_BYTE_SIZE 160 #define XILINX_DCACHE_BYTE_SIZE 32768 161 #endif 162 163 /* 164 * BOOTP options 165 */ 166 #define CONFIG_BOOTP_BOOTFILESIZE 167 #define CONFIG_BOOTP_BOOTPATH 168 #define CONFIG_BOOTP_GATEWAY 169 #define CONFIG_BOOTP_HOSTNAME 170 171 /* 172 * Command line configuration. 173 */ 174 #define CONFIG_CMD_IRQ 175 #define CONFIG_CMD_MFSL 176 177 #if defined(FLASH) 178 # define CONFIG_CMD_JFFS2 179 # undef CONFIG_CMD_UBIFS 180 181 # if !defined(RAMENV) 182 # define CONFIG_CMD_SAVES 183 # endif 184 185 #else 186 #if defined(SPIFLASH) 187 188 # if !defined(RAMENV) 189 # define CONFIG_CMD_SAVES 190 # endif 191 #else 192 # undef CONFIG_CMD_JFFS2 193 # undef CONFIG_CMD_UBIFS 194 #endif 195 #endif 196 197 #if defined(CONFIG_CMD_JFFS2) 198 # define CONFIG_MTD_PARTITIONS 199 #endif 200 201 #if defined(CONFIG_CMD_UBIFS) 202 # define CONFIG_LZO 203 #endif 204 205 #if defined(CONFIG_CMD_UBI) 206 # define CONFIG_MTD_PARTITIONS 207 # define CONFIG_RBTREE 208 #endif 209 210 #if defined(CONFIG_MTD_PARTITIONS) 211 /* MTD partitions */ 212 #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */ 213 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 214 #define CONFIG_FLASH_CFI_MTD 215 #define MTDIDS_DEFAULT "nor0=flash-0" 216 217 /* default mtd partition table */ 218 #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\ 219 "256k(env),3m(kernel),1m(romfs),"\ 220 "1m(cramfs),-(jffs2)" 221 #endif 222 223 /* size of console buffer */ 224 #define CONFIG_SYS_CBSIZE 512 225 /* print buffer size */ 226 #define CONFIG_SYS_PBSIZE \ 227 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 228 /* max number of command args */ 229 #define CONFIG_SYS_MAXARGS 15 230 #define CONFIG_SYS_LONGHELP 231 /* default load address */ 232 #define CONFIG_SYS_LOAD_ADDR 0 233 234 #define CONFIG_BOOTARGS "root=romfs" 235 #define CONFIG_HOSTNAME XILINX_BOARD_NAME 236 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" 237 238 /* architecture dependent code */ 239 #define CONFIG_SYS_USR_EXCEP /* user exception */ 240 241 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" 242 243 #ifndef CONFIG_EXTRA_ENV_SETTINGS 244 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \ 245 "nor0=flash-0\0"\ 246 "mtdparts=mtdparts=flash-0:"\ 247 "256k(u-boot),256k(env),3m(kernel),"\ 248 "1m(romfs),1m(cramfs),-(jffs2)\0"\ 249 "nc=setenv stdout nc;"\ 250 "setenv stdin nc\0" \ 251 "serial=setenv stdout serial;"\ 252 "setenv stdin serial\0" 253 #endif 254 255 #define CONFIG_CMDLINE_EDITING 256 257 /* Enable flat device tree support */ 258 #define CONFIG_LMB 1 259 260 #if defined(CONFIG_XILINX_AXIEMAC) 261 # define CONFIG_MII 1 262 # define CONFIG_PHY_GIGE 1 263 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 264 # define CONFIG_PHY_ATHEROS 1 265 # define CONFIG_PHY_BROADCOM 1 266 # define CONFIG_PHY_DAVICOM 1 267 # define CONFIG_PHY_LXT 1 268 # define CONFIG_PHY_MARVELL 1 269 # define CONFIG_PHY_MICREL 1 270 # define CONFIG_PHY_MICREL_KSZ9021 271 # define CONFIG_PHY_NATSEMI 1 272 # define CONFIG_PHY_REALTEK 1 273 # define CONFIG_PHY_VITESSE 1 274 #else 275 # undef CONFIG_MII 276 #endif 277 278 /* SPL part */ 279 #define CONFIG_CMD_SPL 280 #define CONFIG_SPL_FRAMEWORK 281 #define CONFIG_SPL_BOARD_INIT 282 283 #define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds" 284 285 #ifdef CONFIG_SYS_FLASH_BASE 286 # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE 287 #endif 288 289 /* for booting directly linux */ 290 291 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ 292 0x40000) 293 #define CONFIG_SYS_FDT_SIZE (16<<10) 294 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \ 295 0x1000000) 296 297 /* SP location before relocation, must use scratch RAM */ 298 /* BRAM start */ 299 #define CONFIG_SYS_INIT_RAM_ADDR 0x0 300 /* BRAM size - will be generated */ 301 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000 302 303 # define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 304 CONFIG_SYS_INIT_RAM_SIZE - \ 305 CONFIG_SYS_MALLOC_F_LEN) 306 307 /* Just for sure that there is a space for stack */ 308 #define CONFIG_SPL_STACK_SIZE 0x100 309 310 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 311 312 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \ 313 CONFIG_SYS_INIT_RAM_ADDR - \ 314 CONFIG_SYS_MALLOC_F_LEN - \ 315 CONFIG_SPL_STACK_SIZE) 316 317 #endif /* __CONFIG_H */ 318