1 /* 2 * (C) Copyright 2007-2010 Michal Simek 3 * 4 * Michal SIMEK <monstr@monstr.eu> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include "../board/xilinx/microblaze-generic/xparameters.h" 13 14 /* MicroBlaze CPU */ 15 #define MICROBLAZE_V5 1 16 17 /* linear and spi flash memory */ 18 #ifdef XILINX_FLASH_START 19 #define FLASH 20 #undef SPIFLASH 21 #undef RAMENV /* hold environment in flash */ 22 #else 23 #ifdef XILINX_SPI_FLASH_BASEADDR 24 #undef FLASH 25 #define SPIFLASH 26 #undef RAMENV /* hold environment in flash */ 27 #else 28 #undef FLASH 29 #undef SPIFLASH 30 #define RAMENV /* hold environment in RAM */ 31 #endif 32 #endif 33 34 /* uart */ 35 /* The following table includes the supported baudrates */ 36 # define CONFIG_SYS_BAUDRATE_TABLE \ 37 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 38 39 /* setting reset address */ 40 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ 41 42 /* gpio */ 43 #ifdef XILINX_GPIO_BASEADDR 44 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR 45 #endif 46 47 /* watchdog */ 48 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ) 49 # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR 50 # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ 51 # ifndef CONFIG_SPL_BUILD 52 # define CONFIG_HW_WATCHDOG 53 # define CONFIG_XILINX_TB_WATCHDOG 54 # endif 55 #endif 56 57 #define CONFIG_SYS_MALLOC_LEN 0xC0000 58 59 /* Stack location before relocation */ 60 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \ 61 CONFIG_SYS_MALLOC_F_LEN) 62 63 /* 64 * CFI flash memory layout - Example 65 * CONFIG_SYS_FLASH_BASE = 0x2200_0000; 66 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB 67 * 68 * SECT_SIZE = 0x20000; 128kB is one sector 69 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store 70 * 71 * 0x2200_0000 CONFIG_SYS_FLASH_BASE 72 * FREE 256kB 73 * 0x2204_0000 CONFIG_ENV_ADDR 74 * ENV_AREA 128kB 75 * 0x2206_0000 76 * FREE 77 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE 78 * 79 */ 80 81 #ifdef FLASH 82 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START 83 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE 84 # define CONFIG_SYS_FLASH_CFI 1 85 # define CONFIG_FLASH_CFI_DRIVER 1 86 /* ?empty sector */ 87 # define CONFIG_SYS_FLASH_EMPTY_INFO 1 88 /* max number of memory banks */ 89 # define CONFIG_SYS_MAX_FLASH_BANKS 1 90 /* max number of sectors on one chip */ 91 # define CONFIG_SYS_MAX_FLASH_SECT 512 92 /* hardware flash protection */ 93 # define CONFIG_SYS_FLASH_PROTECTION 94 /* use buffered writes (20x faster) */ 95 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 96 # ifdef RAMENV 97 # define CONFIG_ENV_SIZE 0x1000 98 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 99 100 # else /* FLASH && !RAMENV */ 101 /* 128K(one sector) for env */ 102 # define CONFIG_ENV_SECT_SIZE 0x20000 103 # define CONFIG_ENV_ADDR \ 104 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) 105 # define CONFIG_ENV_SIZE 0x20000 106 # endif /* FLASH && !RAMBOOT */ 107 #else /* !FLASH */ 108 109 #ifdef SPIFLASH 110 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR 111 # define CONFIG_SPI 1 112 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 113 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ 114 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS 115 116 # ifdef RAMENV 117 # define CONFIG_ENV_SIZE 0x1000 118 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 119 120 # else /* SPIFLASH && !RAMENV */ 121 # define CONFIG_ENV_SPI_MODE SPI_MODE_3 122 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 123 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 124 /* 128K(two sectors) for env */ 125 # define CONFIG_ENV_SECT_SIZE 0x10000 126 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE) 127 /* Warning: adjust the offset in respect of other flash content and size */ 128 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */ 129 # endif /* SPIFLASH && !RAMBOOT */ 130 #else /* !SPIFLASH */ 131 132 /* ENV in RAM */ 133 # define CONFIG_ENV_SIZE 0x1000 134 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 135 #endif /* !SPIFLASH */ 136 #endif /* !FLASH */ 137 138 #if defined(XILINX_USE_ICACHE) 139 # define CONFIG_ICACHE 140 #else 141 # undef CONFIG_ICACHE 142 #endif 143 144 #if defined(XILINX_USE_DCACHE) 145 # define CONFIG_DCACHE 146 #else 147 # undef CONFIG_DCACHE 148 #endif 149 150 #ifndef XILINX_DCACHE_BYTE_SIZE 151 #define XILINX_DCACHE_BYTE_SIZE 32768 152 #endif 153 154 /* 155 * BOOTP options 156 */ 157 #define CONFIG_BOOTP_BOOTFILESIZE 158 159 #if defined(CONFIG_CMD_JFFS2) 160 # define CONFIG_MTD_PARTITIONS 161 #endif 162 163 #if defined(CONFIG_CMD_UBI) 164 # define CONFIG_MTD_PARTITIONS 165 #endif 166 167 #if defined(CONFIG_MTD_PARTITIONS) 168 /* MTD partitions */ 169 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 170 #define CONFIG_FLASH_CFI_MTD 171 172 /* default mtd partition table */ 173 #endif 174 175 /* size of console buffer */ 176 #define CONFIG_SYS_CBSIZE 512 177 /* max number of command args */ 178 #define CONFIG_SYS_MAXARGS 15 179 /* default load address */ 180 #define CONFIG_SYS_LOAD_ADDR 0 181 182 #define CONFIG_HOSTNAME XILINX_BOARD_NAME 183 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" 184 185 /* architecture dependent code */ 186 #define CONFIG_SYS_USR_EXCEP /* user exception */ 187 188 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" 189 190 #ifndef CONFIG_EXTRA_ENV_SETTINGS 191 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \ 192 "nor0=flash-0\0"\ 193 "mtdparts=mtdparts=flash-0:"\ 194 "256k(u-boot),256k(env),3m(kernel),"\ 195 "1m(romfs),1m(cramfs),-(jffs2)\0"\ 196 "nc=setenv stdout nc;"\ 197 "setenv stdin nc\0" \ 198 "serial=setenv stdout serial;"\ 199 "setenv stdin serial\0" 200 #endif 201 202 /* Enable flat device tree support */ 203 #define CONFIG_LMB 1 204 205 #if defined(CONFIG_XILINX_AXIEMAC) 206 # define CONFIG_MII 1 207 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 208 #else 209 # undef CONFIG_MII 210 #endif 211 212 /* SPL part */ 213 214 #ifdef CONFIG_SYS_FLASH_BASE 215 # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE 216 #endif 217 218 /* for booting directly linux */ 219 220 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ 221 0x40000) 222 #define CONFIG_SYS_FDT_SIZE (16<<10) 223 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \ 224 0x1000000) 225 226 /* SP location before relocation, must use scratch RAM */ 227 /* BRAM start */ 228 #define CONFIG_SYS_INIT_RAM_ADDR 0x0 229 /* BRAM size - will be generated */ 230 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000 231 232 # define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 233 CONFIG_SYS_INIT_RAM_SIZE - \ 234 CONFIG_SYS_MALLOC_F_LEN) 235 236 /* Just for sure that there is a space for stack */ 237 #define CONFIG_SPL_STACK_SIZE 0x100 238 239 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 240 241 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \ 242 CONFIG_SYS_INIT_RAM_ADDR - \ 243 CONFIG_SYS_MALLOC_F_LEN - \ 244 CONFIG_SPL_STACK_SIZE) 245 246 #endif /* __CONFIG_H */ 247