1 /* 2 * (C) Copyright 2007-2010 Michal Simek 3 * 4 * Michal SIMEK <monstr@monstr.eu> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include "../board/xilinx/microblaze-generic/xparameters.h" 13 14 /* MicroBlaze CPU */ 15 #define MICROBLAZE_V5 1 16 17 /* Open Firmware DTS */ 18 #define CONFIG_DEFAULT_DEVICE_TREE microblaze-generic 19 20 /* linear and spi flash memory */ 21 #ifdef XILINX_FLASH_START 22 #define FLASH 23 #undef SPIFLASH 24 #undef RAMENV /* hold environment in flash */ 25 #else 26 #ifdef XILINX_SPI_FLASH_BASEADDR 27 #undef FLASH 28 #define SPIFLASH 29 #undef RAMENV /* hold environment in flash */ 30 #else 31 #undef FLASH 32 #undef SPIFLASH 33 #define RAMENV /* hold environment in RAM */ 34 #endif 35 #endif 36 37 /* uart */ 38 #ifdef XILINX_UARTLITE_BASEADDR 39 # define CONFIG_XILINX_UARTLITE 40 # define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR 41 # define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE 42 # define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } 43 # define CONSOLE_ARG "console=console=ttyUL0,115200\0" 44 #elif XILINX_UART16550_BASEADDR 45 # define CONFIG_SYS_NS16550 1 46 # define CONFIG_SYS_NS16550_SERIAL 47 # if defined(__MICROBLAZEEL__) 48 # define CONFIG_SYS_NS16550_REG_SIZE -4 49 # else 50 # define CONFIG_SYS_NS16550_REG_SIZE 4 51 # endif 52 # define CONFIG_CONS_INDEX 1 53 # define CONFIG_SYS_NS16550_COM1 \ 54 ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000) 55 # define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ 56 # define CONFIG_BAUDRATE 115200 57 58 /* The following table includes the supported baudrates */ 59 # define CONFIG_SYS_BAUDRATE_TABLE \ 60 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 61 # define CONSOLE_ARG "console=console=ttyS0,115200\0" 62 #else 63 # error Undefined uart 64 #endif 65 66 /* setting reset address */ 67 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ 68 69 /* ethernet */ 70 #undef CONFIG_SYS_ENET 71 #if defined(XILINX_EMACLITE_BASEADDR) || defined(CONFIG_OF_CONTROL) 72 # define CONFIG_XILINX_EMACLITE 1 73 # define CONFIG_SYS_ENET 74 #endif 75 #if defined(XILINX_LLTEMAC_BASEADDR) 76 # define CONFIG_XILINX_LL_TEMAC 1 77 # define CONFIG_SYS_ENET 78 #endif 79 #if defined(XILINX_AXIEMAC_BASEADDR) 80 # define CONFIG_XILINX_AXIEMAC 1 81 # define CONFIG_SYS_ENET 82 #endif 83 84 #undef ET_DEBUG 85 86 /* gpio */ 87 #ifdef XILINX_GPIO_BASEADDR 88 # define CONFIG_XILINX_GPIO 89 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR 90 #endif 91 92 /* interrupt controller */ 93 #ifdef XILINX_INTC_BASEADDR 94 # define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR 95 # define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS 96 #endif 97 98 /* timer */ 99 #if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ) 100 # define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR 101 # define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ 102 #endif 103 104 /* watchdog */ 105 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ) 106 # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR 107 # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ 108 # define CONFIG_HW_WATCHDOG 109 # define CONFIG_XILINX_TB_WATCHDOG 110 #endif 111 112 /* 113 * memory layout - Example 114 * CONFIG_SYS_TEXT_BASE = 0x1200_0000; defined in config.mk 115 * CONFIG_SYS_SRAM_BASE = 0x1000_0000; 116 * CONFIG_SYS_SRAM_SIZE = 0x0400_0000; 64MB 117 * 118 * CONFIG_SYS_MONITOR_LEN = 0x40000 119 * CONFIG_SYS_MALLOC_LEN = 3 * CONFIG_SYS_MONITOR_LEN = 0xC0000 120 * 121 * CONFIG_SYS_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000 122 * CONFIG_SYS_MONITOR_BASE = 0x13FF_F000 - CONFIG_SYS_MONITOR_LEN = 0x13FB_F000 123 * CONFIG_SYS_MALLOC_BASE = 0x13FB_F000 - CONFIG_SYS_MALLOC_LEN = 0x13EF_F000 124 * 125 * 0x1000_0000 CONFIG_SYS_SDRAM_BASE 126 * MEMTEST_AREA 64kB 127 * FREE 128 * 0x1200_0000 CONFIG_SYS_TEXT_BASE 129 * U-BOOT code 130 * 0x1202_0000 131 * FREE 132 * 133 * STACK 134 * 0x13EF_F000 CONFIG_SYS_MALLOC_BASE 135 * MALLOC_AREA 768kB Alloc 136 * 0x13FB_F000 CONFIG_SYS_MONITOR_BASE 137 * MONITOR_CODE 256kB Env 138 * 0x13FF_F000 CONFIG_SYS_GBL_DATA_OFFSET 139 * GLOBAL_DATA 4kB bd, gd 140 * 0x1400_0000 CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE 141 */ 142 143 /* ddr sdram - main memory */ 144 #define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START 145 #define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE 146 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 147 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) 148 149 /* global pointer */ 150 /* start of global data */ 151 #define CONFIG_SYS_GBL_DATA_OFFSET \ 152 (CONFIG_SYS_SDRAM_SIZE - GENERATED_GBL_DATA_SIZE) 153 154 /* monitor code */ 155 #define SIZE 0x40000 156 #define CONFIG_SYS_MONITOR_LEN SIZE 157 #define CONFIG_SYS_MONITOR_BASE \ 158 (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET \ 159 - CONFIG_SYS_MONITOR_LEN - GENERATED_BD_INFO_SIZE) 160 #define CONFIG_SYS_MONITOR_END \ 161 (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 162 #define CONFIG_SYS_MALLOC_LEN (SIZE * 3) 163 #define CONFIG_SYS_MALLOC_BASE \ 164 (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) 165 166 /* stack */ 167 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MALLOC_BASE 168 169 /* 170 * CFI flash memory layout - Example 171 * CONFIG_SYS_FLASH_BASE = 0x2200_0000; 172 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB 173 * 174 * SECT_SIZE = 0x20000; 128kB is one sector 175 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store 176 * 177 * 0x2200_0000 CONFIG_SYS_FLASH_BASE 178 * FREE 256kB 179 * 0x2204_0000 CONFIG_ENV_ADDR 180 * ENV_AREA 128kB 181 * 0x2206_0000 182 * FREE 183 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE 184 * 185 */ 186 187 #ifdef FLASH 188 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START 189 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE 190 # define CONFIG_SYS_FLASH_CFI 1 191 # define CONFIG_FLASH_CFI_DRIVER 1 192 /* ?empty sector */ 193 # define CONFIG_SYS_FLASH_EMPTY_INFO 1 194 /* max number of memory banks */ 195 # define CONFIG_SYS_MAX_FLASH_BANKS 1 196 /* max number of sectors on one chip */ 197 # define CONFIG_SYS_MAX_FLASH_SECT 512 198 /* hardware flash protection */ 199 # define CONFIG_SYS_FLASH_PROTECTION 200 /* use buffered writes (20x faster) */ 201 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 202 # ifdef RAMENV 203 # define CONFIG_ENV_IS_NOWHERE 1 204 # define CONFIG_ENV_SIZE 0x1000 205 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 206 207 # else /* FLASH && !RAMENV */ 208 # define CONFIG_ENV_IS_IN_FLASH 1 209 /* 128K(one sector) for env */ 210 # define CONFIG_ENV_SECT_SIZE 0x20000 211 # define CONFIG_ENV_ADDR \ 212 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) 213 # define CONFIG_ENV_SIZE 0x20000 214 # endif /* FLASH && !RAMBOOT */ 215 #else /* !FLASH */ 216 217 #ifdef SPIFLASH 218 # define CONFIG_SYS_NO_FLASH 1 219 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR 220 # define CONFIG_XILINX_SPI 1 221 # define CONFIG_SPI 1 222 # define CONFIG_SPI_FLASH 1 223 # define CONFIG_SPI_FLASH_STMICRO 1 224 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 225 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ 226 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS 227 228 # ifdef RAMENV 229 # define CONFIG_ENV_IS_NOWHERE 1 230 # define CONFIG_ENV_SIZE 0x1000 231 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 232 233 # else /* SPIFLASH && !RAMENV */ 234 # define CONFIG_ENV_IS_IN_SPI_FLASH 1 235 # define CONFIG_ENV_SPI_MODE SPI_MODE_3 236 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 237 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 238 /* 128K(two sectors) for env */ 239 # define CONFIG_ENV_SECT_SIZE 0x10000 240 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE) 241 /* Warning: adjust the offset in respect of other flash content and size */ 242 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */ 243 # endif /* SPIFLASH && !RAMBOOT */ 244 #else /* !SPIFLASH */ 245 246 /* ENV in RAM */ 247 # define CONFIG_SYS_NO_FLASH 1 248 # define CONFIG_ENV_IS_NOWHERE 1 249 # define CONFIG_ENV_SIZE 0x1000 250 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 251 #endif /* !SPIFLASH */ 252 #endif /* !FLASH */ 253 254 /* system ace */ 255 #ifdef XILINX_SYSACE_BASEADDR 256 # define CONFIG_SYSTEMACE 257 /* #define DEBUG_SYSTEMACE */ 258 # define SYSTEMACE_CONFIG_FPGA 259 # define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR 260 # define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH 261 # define CONFIG_DOS_PARTITION 262 #endif 263 264 #if defined(XILINX_USE_ICACHE) 265 # define CONFIG_ICACHE 266 #else 267 # undef CONFIG_ICACHE 268 #endif 269 270 #if defined(XILINX_USE_DCACHE) 271 # define CONFIG_DCACHE 272 #else 273 # undef CONFIG_DCACHE 274 #endif 275 276 #ifndef XILINX_DCACHE_BYTE_SIZE 277 #define XILINX_DCACHE_BYTE_SIZE 32768 278 #endif 279 280 /* 281 * BOOTP options 282 */ 283 #define CONFIG_BOOTP_BOOTFILESIZE 284 #define CONFIG_BOOTP_BOOTPATH 285 #define CONFIG_BOOTP_GATEWAY 286 #define CONFIG_BOOTP_HOSTNAME 287 288 /* 289 * Command line configuration. 290 */ 291 #include <config_cmd_default.h> 292 293 #define CONFIG_CMD_ASKENV 294 #define CONFIG_CMD_IRQ 295 #define CONFIG_CMD_MFSL 296 #define CONFIG_CMD_ECHO 297 #define CONFIG_CMD_GPIO 298 299 #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE) 300 # define CONFIG_CMD_CACHE 301 #else 302 # undef CONFIG_CMD_CACHE 303 #endif 304 305 #ifndef CONFIG_SYS_ENET 306 # undef CONFIG_CMD_NET 307 # undef CONFIG_CMD_NFS 308 #else 309 # define CONFIG_CMD_PING 310 # define CONFIG_CMD_DHCP 311 # define CONFIG_CMD_TFTPPUT 312 #endif 313 314 #if defined(CONFIG_SYSTEMACE) 315 # define CONFIG_CMD_EXT2 316 # define CONFIG_CMD_FAT 317 #endif 318 319 #if defined(FLASH) 320 # define CONFIG_CMD_ECHO 321 # define CONFIG_CMD_FLASH 322 # define CONFIG_CMD_IMLS 323 # define CONFIG_CMD_JFFS2 324 # define CONFIG_CMD_UBI 325 # undef CONFIG_CMD_UBIFS 326 327 # if !defined(RAMENV) 328 # define CONFIG_CMD_SAVEENV 329 # define CONFIG_CMD_SAVES 330 # endif 331 332 #else 333 #if defined(SPIFLASH) 334 # define CONFIG_CMD_SF 335 336 # if !defined(RAMENV) 337 # define CONFIG_CMD_SAVEENV 338 # define CONFIG_CMD_SAVES 339 # endif 340 #else 341 # undef CONFIG_CMD_IMLS 342 # undef CONFIG_CMD_FLASH 343 # undef CONFIG_CMD_JFFS2 344 # undef CONFIG_CMD_UBI 345 # undef CONFIG_CMD_UBIFS 346 #endif 347 #endif 348 349 #if defined(CONFIG_CMD_JFFS2) 350 # define CONFIG_MTD_PARTITIONS 351 #endif 352 353 #if defined(CONFIG_CMD_UBIFS) 354 # define CONFIG_CMD_UBI 355 # define CONFIG_LZO 356 #endif 357 358 #if defined(CONFIG_CMD_UBI) 359 # define CONFIG_MTD_PARTITIONS 360 # define CONFIG_RBTREE 361 #endif 362 363 #if defined(CONFIG_MTD_PARTITIONS) 364 /* MTD partitions */ 365 #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */ 366 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 367 #define CONFIG_FLASH_CFI_MTD 368 #define MTDIDS_DEFAULT "nor0=flash-0" 369 370 /* default mtd partition table */ 371 #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\ 372 "256k(env),3m(kernel),1m(romfs),"\ 373 "1m(cramfs),-(jffs2)" 374 #endif 375 376 /* Miscellaneous configurable options */ 377 #define CONFIG_SYS_PROMPT "U-Boot-mONStR> " 378 /* size of console buffer */ 379 #define CONFIG_SYS_CBSIZE 512 380 /* print buffer size */ 381 #define CONFIG_SYS_PBSIZE \ 382 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 383 /* max number of command args */ 384 #define CONFIG_SYS_MAXARGS 15 385 #define CONFIG_SYS_LONGHELP 386 /* default load address */ 387 #define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START 388 389 #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */ 390 #define CONFIG_BOOTARGS "root=romfs" 391 #define CONFIG_HOSTNAME XILINX_BOARD_NAME 392 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" 393 #define CONFIG_IPADDR 192.168.0.3 394 #define CONFIG_SERVERIP 192.168.0.5 395 #define CONFIG_GATEWAYIP 192.168.0.1 396 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD 397 398 /* architecture dependent code */ 399 #define CONFIG_SYS_USR_EXCEP /* user exception */ 400 401 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" 402 403 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \ 404 "nor0=flash-0\0"\ 405 "mtdparts=mtdparts=flash-0:"\ 406 "256k(u-boot),256k(env),3m(kernel),"\ 407 "1m(romfs),1m(cramfs),-(jffs2)\0"\ 408 "nc=setenv stdout nc;"\ 409 "setenv stdin nc\0" \ 410 "serial=setenv stdout serial;"\ 411 "setenv stdin serial\0" 412 413 #define CONFIG_CMDLINE_EDITING 414 415 #define CONFIG_NETCONSOLE 416 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 417 418 /* Use the HUSH parser */ 419 #define CONFIG_SYS_HUSH_PARSER 420 421 /* Enable flat device tree support */ 422 #define CONFIG_LMB 1 423 #define CONFIG_FIT 1 424 #define CONFIG_OF_LIBFDT 1 425 426 #if defined(CONFIG_XILINX_LL_TEMAC) || defined(CONFIG_XILINX_AXIEMAC) 427 # define CONFIG_MII 1 428 # define CONFIG_CMD_MII 1 429 # define CONFIG_PHY_GIGE 1 430 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 431 # define CONFIG_PHYLIB 1 432 # define CONFIG_PHY_ATHEROS 1 433 # define CONFIG_PHY_BROADCOM 1 434 # define CONFIG_PHY_DAVICOM 1 435 # define CONFIG_PHY_LXT 1 436 # define CONFIG_PHY_MARVELL 1 437 # define CONFIG_PHY_MICREL 1 438 # define CONFIG_PHY_NATSEMI 1 439 # define CONFIG_PHY_REALTEK 1 440 # define CONFIG_PHY_VITESSE 1 441 #else 442 # undef CONFIG_MII 443 # undef CONFIG_CMD_MII 444 # undef CONFIG_PHYLIB 445 #endif 446 447 /* SPL part */ 448 #define CONFIG_CMD_SPL 449 #define CONFIG_SPL_FRAMEWORK 450 #define CONFIG_SPL_LIBCOMMON_SUPPORT 451 #define CONFIG_SPL_LIBGENERIC_SUPPORT 452 #define CONFIG_SPL_SERIAL_SUPPORT 453 #define CONFIG_SPL_BOARD_INIT 454 455 #define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds" 456 457 #define CONFIG_SPL_RAM_DEVICE 458 #define CONFIG_SPL_NOR_SUPPORT 459 460 /* for booting directly linux */ 461 #define CONFIG_SPL_OS_BOOT 462 463 #define CONFIG_SYS_OS_BASE (CONFIG_SYS_FLASH_BASE + \ 464 0x60000) 465 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ 466 0x40000) 467 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \ 468 0x1000000) 469 470 /* SP location before relocation, must use scratch RAM */ 471 /* BRAM start */ 472 #define CONFIG_SYS_INIT_RAM_ADDR 0x0 473 /* BRAM size - will be generated */ 474 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 475 /* Stack pointer prior relocation, must situated at on-chip RAM */ 476 #define CONFIG_SYS_SPL_MALLOC_END (CONFIG_SYS_INIT_RAM_ADDR + \ 477 CONFIG_SYS_INIT_RAM_SIZE - \ 478 GENERATED_GBL_DATA_SIZE) 479 480 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100 481 482 /* 483 * The main reason to do it in this way is that MALLOC_START 484 * can't be defined - common/spl/spl.c 485 */ 486 #if (CONFIG_SYS_SPL_MALLOC_SIZE != 0) 487 # define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_SPL_MALLOC_END - \ 488 CONFIG_SYS_SPL_MALLOC_SIZE) 489 # define CONFIG_SPL_STACK_ADDR CONFIG_SYS_SPL_MALLOC_START 490 #else 491 # define CONFIG_SPL_STACK_ADDR CONFIG_SYS_SPL_MALLOC_END 492 #endif 493 494 /* Just for sure that there is a space for stack */ 495 #define CONFIG_SPL_STACK_SIZE 0x100 496 497 #define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE 498 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 499 500 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \ 501 CONFIG_SYS_INIT_RAM_ADDR - \ 502 GENERATED_GBL_DATA_SIZE - \ 503 CONFIG_SYS_SPL_MALLOC_SIZE - \ 504 CONFIG_SPL_STACK_SIZE) 505 506 #endif /* __CONFIG_H */ 507