1 /* 2 * (C) Copyright 2007-2010 Michal Simek 3 * 4 * Michal SIMEK <monstr@monstr.eu> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include "../board/xilinx/microblaze-generic/xparameters.h" 13 14 /* MicroBlaze CPU */ 15 #define MICROBLAZE_V5 1 16 17 /* linear and spi flash memory */ 18 #ifdef XILINX_FLASH_START 19 #define FLASH 20 #undef SPIFLASH 21 #undef RAMENV /* hold environment in flash */ 22 #else 23 #ifdef XILINX_SPI_FLASH_BASEADDR 24 #undef FLASH 25 #define SPIFLASH 26 #undef RAMENV /* hold environment in flash */ 27 #else 28 #undef FLASH 29 #undef SPIFLASH 30 #define RAMENV /* hold environment in RAM */ 31 #endif 32 #endif 33 34 /* uart */ 35 /* The following table includes the supported baudrates */ 36 # define CONFIG_SYS_BAUDRATE_TABLE \ 37 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 38 39 /* setting reset address */ 40 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ 41 42 /* gpio */ 43 #ifdef XILINX_GPIO_BASEADDR 44 # define CONFIG_XILINX_GPIO 45 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR 46 #endif 47 48 /* watchdog */ 49 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ) 50 # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR 51 # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ 52 # ifndef CONFIG_SPL_BUILD 53 # define CONFIG_HW_WATCHDOG 54 # define CONFIG_XILINX_TB_WATCHDOG 55 # endif 56 #endif 57 58 #define CONFIG_SYS_MALLOC_LEN 0xC0000 59 60 /* Stack location before relocation */ 61 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \ 62 CONFIG_SYS_MALLOC_F_LEN) 63 64 /* 65 * CFI flash memory layout - Example 66 * CONFIG_SYS_FLASH_BASE = 0x2200_0000; 67 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB 68 * 69 * SECT_SIZE = 0x20000; 128kB is one sector 70 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store 71 * 72 * 0x2200_0000 CONFIG_SYS_FLASH_BASE 73 * FREE 256kB 74 * 0x2204_0000 CONFIG_ENV_ADDR 75 * ENV_AREA 128kB 76 * 0x2206_0000 77 * FREE 78 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE 79 * 80 */ 81 82 #ifdef FLASH 83 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START 84 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE 85 # define CONFIG_SYS_FLASH_CFI 1 86 # define CONFIG_FLASH_CFI_DRIVER 1 87 /* ?empty sector */ 88 # define CONFIG_SYS_FLASH_EMPTY_INFO 1 89 /* max number of memory banks */ 90 # define CONFIG_SYS_MAX_FLASH_BANKS 1 91 /* max number of sectors on one chip */ 92 # define CONFIG_SYS_MAX_FLASH_SECT 512 93 /* hardware flash protection */ 94 # define CONFIG_SYS_FLASH_PROTECTION 95 /* use buffered writes (20x faster) */ 96 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 97 # ifdef RAMENV 98 # define CONFIG_ENV_SIZE 0x1000 99 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 100 101 # else /* FLASH && !RAMENV */ 102 /* 128K(one sector) for env */ 103 # define CONFIG_ENV_SECT_SIZE 0x20000 104 # define CONFIG_ENV_ADDR \ 105 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) 106 # define CONFIG_ENV_SIZE 0x20000 107 # endif /* FLASH && !RAMBOOT */ 108 #else /* !FLASH */ 109 110 #ifdef SPIFLASH 111 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR 112 # define CONFIG_SPI 1 113 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 114 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ 115 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS 116 117 # ifdef RAMENV 118 # define CONFIG_ENV_SIZE 0x1000 119 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 120 121 # else /* SPIFLASH && !RAMENV */ 122 # define CONFIG_ENV_SPI_MODE SPI_MODE_3 123 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 124 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 125 /* 128K(two sectors) for env */ 126 # define CONFIG_ENV_SECT_SIZE 0x10000 127 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE) 128 /* Warning: adjust the offset in respect of other flash content and size */ 129 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */ 130 # endif /* SPIFLASH && !RAMBOOT */ 131 #else /* !SPIFLASH */ 132 133 /* ENV in RAM */ 134 # define CONFIG_ENV_SIZE 0x1000 135 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 136 #endif /* !SPIFLASH */ 137 #endif /* !FLASH */ 138 139 #if defined(XILINX_USE_ICACHE) 140 # define CONFIG_ICACHE 141 #else 142 # undef CONFIG_ICACHE 143 #endif 144 145 #if defined(XILINX_USE_DCACHE) 146 # define CONFIG_DCACHE 147 #else 148 # undef CONFIG_DCACHE 149 #endif 150 151 #ifndef XILINX_DCACHE_BYTE_SIZE 152 #define XILINX_DCACHE_BYTE_SIZE 32768 153 #endif 154 155 /* 156 * BOOTP options 157 */ 158 #define CONFIG_BOOTP_BOOTFILESIZE 159 #define CONFIG_BOOTP_BOOTPATH 160 #define CONFIG_BOOTP_GATEWAY 161 #define CONFIG_BOOTP_HOSTNAME 162 163 /* 164 * Command line configuration. 165 */ 166 #define CONFIG_CMD_MFSL 167 168 #if defined(FLASH) 169 # if !defined(RAMENV) 170 # define CONFIG_CMD_SAVES 171 # endif 172 173 #else 174 #if defined(SPIFLASH) 175 176 # if !defined(RAMENV) 177 # define CONFIG_CMD_SAVES 178 # endif 179 #endif 180 #endif 181 182 #if defined(CONFIG_CMD_JFFS2) 183 # define CONFIG_MTD_PARTITIONS 184 #endif 185 186 #if defined(CONFIG_CMD_UBI) 187 # define CONFIG_MTD_PARTITIONS 188 #endif 189 190 #if defined(CONFIG_MTD_PARTITIONS) 191 /* MTD partitions */ 192 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 193 #define CONFIG_FLASH_CFI_MTD 194 #define MTDIDS_DEFAULT "nor0=flash-0" 195 196 /* default mtd partition table */ 197 #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\ 198 "256k(env),3m(kernel),1m(romfs),"\ 199 "1m(cramfs),-(jffs2)" 200 #endif 201 202 /* size of console buffer */ 203 #define CONFIG_SYS_CBSIZE 512 204 /* print buffer size */ 205 #define CONFIG_SYS_PBSIZE \ 206 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 207 /* max number of command args */ 208 #define CONFIG_SYS_MAXARGS 15 209 #define CONFIG_SYS_LONGHELP 210 /* default load address */ 211 #define CONFIG_SYS_LOAD_ADDR 0 212 213 #define CONFIG_BOOTARGS "root=romfs" 214 #define CONFIG_HOSTNAME XILINX_BOARD_NAME 215 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" 216 217 /* architecture dependent code */ 218 #define CONFIG_SYS_USR_EXCEP /* user exception */ 219 220 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" 221 222 #ifndef CONFIG_EXTRA_ENV_SETTINGS 223 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \ 224 "nor0=flash-0\0"\ 225 "mtdparts=mtdparts=flash-0:"\ 226 "256k(u-boot),256k(env),3m(kernel),"\ 227 "1m(romfs),1m(cramfs),-(jffs2)\0"\ 228 "nc=setenv stdout nc;"\ 229 "setenv stdin nc\0" \ 230 "serial=setenv stdout serial;"\ 231 "setenv stdin serial\0" 232 #endif 233 234 #define CONFIG_CMDLINE_EDITING 235 236 /* Enable flat device tree support */ 237 #define CONFIG_LMB 1 238 239 #if defined(CONFIG_XILINX_AXIEMAC) 240 # define CONFIG_MII 1 241 # define CONFIG_PHY_GIGE 1 242 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 243 # define CONFIG_PHY_ATHEROS 1 244 # define CONFIG_PHY_BROADCOM 1 245 # define CONFIG_PHY_DAVICOM 1 246 # define CONFIG_PHY_LXT 1 247 # define CONFIG_PHY_MARVELL 1 248 # define CONFIG_PHY_MICREL 1 249 # define CONFIG_PHY_MICREL_KSZ9021 250 # define CONFIG_PHY_NATSEMI 1 251 # define CONFIG_PHY_REALTEK 1 252 # define CONFIG_PHY_VITESSE 1 253 #else 254 # undef CONFIG_MII 255 #endif 256 257 /* SPL part */ 258 #define CONFIG_CMD_SPL 259 #define CONFIG_SPL_FRAMEWORK 260 261 #define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds" 262 263 #ifdef CONFIG_SYS_FLASH_BASE 264 # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE 265 #endif 266 267 /* for booting directly linux */ 268 269 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ 270 0x40000) 271 #define CONFIG_SYS_FDT_SIZE (16<<10) 272 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \ 273 0x1000000) 274 275 /* SP location before relocation, must use scratch RAM */ 276 /* BRAM start */ 277 #define CONFIG_SYS_INIT_RAM_ADDR 0x0 278 /* BRAM size - will be generated */ 279 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000 280 281 # define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 282 CONFIG_SYS_INIT_RAM_SIZE - \ 283 CONFIG_SYS_MALLOC_F_LEN) 284 285 /* Just for sure that there is a space for stack */ 286 #define CONFIG_SPL_STACK_SIZE 0x100 287 288 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 289 290 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \ 291 CONFIG_SYS_INIT_RAM_ADDR - \ 292 CONFIG_SYS_MALLOC_F_LEN - \ 293 CONFIG_SPL_STACK_SIZE) 294 295 #endif /* __CONFIG_H */ 296