1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2007-2010 Michal Simek 4 * 5 * Michal SIMEK <monstr@monstr.eu> 6 */ 7 8 #ifndef __CONFIG_H 9 #define __CONFIG_H 10 11 #include "../board/xilinx/microblaze-generic/xparameters.h" 12 13 /* MicroBlaze CPU */ 14 #define MICROBLAZE_V5 1 15 16 /* linear and spi flash memory */ 17 #ifdef XILINX_FLASH_START 18 #define FLASH 19 #undef SPIFLASH 20 #undef RAMENV /* hold environment in flash */ 21 #else 22 #ifdef XILINX_SPI_FLASH_BASEADDR 23 #undef FLASH 24 #define SPIFLASH 25 #undef RAMENV /* hold environment in flash */ 26 #else 27 #undef FLASH 28 #undef SPIFLASH 29 #define RAMENV /* hold environment in RAM */ 30 #endif 31 #endif 32 33 /* uart */ 34 /* The following table includes the supported baudrates */ 35 # define CONFIG_SYS_BAUDRATE_TABLE \ 36 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 37 38 /* setting reset address */ 39 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ 40 41 /* gpio */ 42 #ifdef XILINX_GPIO_BASEADDR 43 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR 44 #endif 45 46 /* watchdog */ 47 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ) 48 # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR 49 # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ 50 # ifndef CONFIG_SPL_BUILD 51 # define CONFIG_HW_WATCHDOG 52 # define CONFIG_XILINX_TB_WATCHDOG 53 # endif 54 #endif 55 56 #define CONFIG_SYS_MALLOC_LEN 0xC0000 57 58 /* Stack location before relocation */ 59 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \ 60 CONFIG_SYS_MALLOC_F_LEN) 61 62 /* 63 * CFI flash memory layout - Example 64 * CONFIG_SYS_FLASH_BASE = 0x2200_0000; 65 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB 66 * 67 * SECT_SIZE = 0x20000; 128kB is one sector 68 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store 69 * 70 * 0x2200_0000 CONFIG_SYS_FLASH_BASE 71 * FREE 256kB 72 * 0x2204_0000 CONFIG_ENV_ADDR 73 * ENV_AREA 128kB 74 * 0x2206_0000 75 * FREE 76 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE 77 * 78 */ 79 80 #ifdef FLASH 81 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START 82 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE 83 # define CONFIG_SYS_FLASH_CFI 1 84 # define CONFIG_FLASH_CFI_DRIVER 1 85 /* ?empty sector */ 86 # define CONFIG_SYS_FLASH_EMPTY_INFO 1 87 /* max number of memory banks */ 88 # define CONFIG_SYS_MAX_FLASH_BANKS 1 89 /* max number of sectors on one chip */ 90 # define CONFIG_SYS_MAX_FLASH_SECT 512 91 /* hardware flash protection */ 92 # define CONFIG_SYS_FLASH_PROTECTION 93 /* use buffered writes (20x faster) */ 94 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 95 # ifdef RAMENV 96 # define CONFIG_ENV_SIZE 0x1000 97 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 98 99 # else /* FLASH && !RAMENV */ 100 /* 128K(one sector) for env */ 101 # define CONFIG_ENV_SECT_SIZE 0x20000 102 # define CONFIG_ENV_ADDR \ 103 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) 104 # define CONFIG_ENV_SIZE 0x20000 105 # endif /* FLASH && !RAMBOOT */ 106 #else /* !FLASH */ 107 108 #ifdef SPIFLASH 109 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR 110 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 111 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ 112 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS 113 114 # ifdef RAMENV 115 # define CONFIG_ENV_SIZE 0x1000 116 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 117 118 # else /* SPIFLASH && !RAMENV */ 119 # define CONFIG_ENV_SPI_MODE SPI_MODE_3 120 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 121 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 122 /* 128K(two sectors) for env */ 123 # define CONFIG_ENV_SECT_SIZE 0x10000 124 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE) 125 /* Warning: adjust the offset in respect of other flash content and size */ 126 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */ 127 # endif /* SPIFLASH && !RAMBOOT */ 128 #else /* !SPIFLASH */ 129 130 /* ENV in RAM */ 131 # define CONFIG_ENV_SIZE 0x1000 132 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 133 #endif /* !SPIFLASH */ 134 #endif /* !FLASH */ 135 136 #if defined(XILINX_USE_ICACHE) 137 # define CONFIG_ICACHE 138 #else 139 # undef CONFIG_ICACHE 140 #endif 141 142 #if defined(XILINX_USE_DCACHE) 143 # define CONFIG_DCACHE 144 #else 145 # undef CONFIG_DCACHE 146 #endif 147 148 #ifndef XILINX_DCACHE_BYTE_SIZE 149 #define XILINX_DCACHE_BYTE_SIZE 32768 150 #endif 151 152 /* 153 * BOOTP options 154 */ 155 #define CONFIG_BOOTP_BOOTFILESIZE 156 157 #if defined(CONFIG_CMD_JFFS2) 158 # define CONFIG_MTD_PARTITIONS 159 #endif 160 161 #if defined(CONFIG_CMD_UBI) 162 # define CONFIG_MTD_PARTITIONS 163 #endif 164 165 #if defined(CONFIG_MTD_PARTITIONS) 166 /* MTD partitions */ 167 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 168 #define CONFIG_FLASH_CFI_MTD 169 170 /* default mtd partition table */ 171 #endif 172 173 /* size of console buffer */ 174 #define CONFIG_SYS_CBSIZE 512 175 /* max number of command args */ 176 #define CONFIG_SYS_MAXARGS 15 177 /* default load address */ 178 #define CONFIG_SYS_LOAD_ADDR 0 179 180 #define CONFIG_HOSTNAME "microblaze-generic" 181 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" 182 183 /* architecture dependent code */ 184 #define CONFIG_SYS_USR_EXCEP /* user exception */ 185 186 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" 187 188 #ifndef CONFIG_EXTRA_ENV_SETTINGS 189 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \ 190 "nor0=flash-0\0"\ 191 "mtdparts=mtdparts=flash-0:"\ 192 "256k(u-boot),256k(env),3m(kernel),"\ 193 "1m(romfs),1m(cramfs),-(jffs2)\0"\ 194 "nc=setenv stdout nc;"\ 195 "setenv stdin nc\0" \ 196 "serial=setenv stdout serial;"\ 197 "setenv stdin serial\0" 198 #endif 199 200 /* Enable flat device tree support */ 201 #define CONFIG_LMB 1 202 203 #if defined(CONFIG_XILINX_AXIEMAC) 204 # define CONFIG_MII 1 205 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 206 #else 207 # undef CONFIG_MII 208 #endif 209 210 /* SPL part */ 211 212 #ifdef CONFIG_SYS_FLASH_BASE 213 # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE 214 #endif 215 216 /* for booting directly linux */ 217 218 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ 219 0x40000) 220 #define CONFIG_SYS_FDT_SIZE (16 << 10) 221 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \ 222 0x1000000) 223 224 /* SP location before relocation, must use scratch RAM */ 225 /* BRAM start */ 226 #define CONFIG_SYS_INIT_RAM_ADDR 0x0 227 /* BRAM size - will be generated */ 228 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000 229 230 # define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 231 CONFIG_SYS_INIT_RAM_SIZE - \ 232 CONFIG_SYS_MALLOC_F_LEN) 233 234 /* Just for sure that there is a space for stack */ 235 #define CONFIG_SPL_STACK_SIZE 0x100 236 237 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 238 239 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \ 240 CONFIG_SYS_INIT_RAM_ADDR - \ 241 CONFIG_SYS_MALLOC_F_LEN - \ 242 CONFIG_SPL_STACK_SIZE) 243 244 #endif /* __CONFIG_H */ 245