1 /* 2 * (C) Copyright 2007-2010 Michal Simek 3 * 4 * Michal SIMEK <monstr@monstr.eu> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 #ifndef __CONFIG_H 26 #define __CONFIG_H 27 28 #include "../board/xilinx/microblaze-generic/xparameters.h" 29 30 /* MicroBlaze CPU */ 31 #define CONFIG_MICROBLAZE 1 32 #define MICROBLAZE_V5 1 33 34 /* Open Firmware DTS */ 35 #define CONFIG_OF_CONTROL 1 36 #define CONFIG_OF_EMBED 1 37 #define CONFIG_DEFAULT_DEVICE_TREE microblaze 38 39 /* linear and spi flash memory */ 40 #ifdef XILINX_FLASH_START 41 #define FLASH 42 #undef SPIFLASH 43 #undef RAMENV /* hold environment in flash */ 44 #else 45 #ifdef XILINX_SPI_FLASH_BASEADDR 46 #undef FLASH 47 #define SPIFLASH 48 #undef RAMENV /* hold environment in flash */ 49 #else 50 #undef FLASH 51 #undef SPIFLASH 52 #define RAMENV /* hold environment in RAM */ 53 #endif 54 #endif 55 56 /* uart */ 57 #ifdef XILINX_UARTLITE_BASEADDR 58 # define CONFIG_XILINX_UARTLITE 59 # define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR 60 # define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE 61 # define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } 62 # define CONSOLE_ARG "console=console=ttyUL0,115200\0" 63 #elif XILINX_UART16550_BASEADDR 64 # define CONFIG_SYS_NS16550 1 65 # define CONFIG_SYS_NS16550_SERIAL 66 # if defined(__MICROBLAZEEL__) 67 # define CONFIG_SYS_NS16550_REG_SIZE -4 68 # else 69 # define CONFIG_SYS_NS16550_REG_SIZE 4 70 # endif 71 # define CONFIG_CONS_INDEX 1 72 # define CONFIG_SYS_NS16550_COM1 \ 73 ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000) 74 # define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ 75 # define CONFIG_BAUDRATE 115200 76 77 /* The following table includes the supported baudrates */ 78 # define CONFIG_SYS_BAUDRATE_TABLE \ 79 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 80 # define CONSOLE_ARG "console=console=ttyS0,115200\0" 81 #else 82 # error Undefined uart 83 #endif 84 85 /* setting reset address */ 86 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ 87 88 /* ethernet */ 89 #undef CONFIG_SYS_ENET 90 #if defined(XILINX_EMACLITE_BASEADDR) 91 # define CONFIG_XILINX_EMACLITE 1 92 # define CONFIG_SYS_ENET 93 #endif 94 #if defined(XILINX_LLTEMAC_BASEADDR) 95 # define CONFIG_XILINX_LL_TEMAC 1 96 # define CONFIG_SYS_ENET 97 #endif 98 #if defined(XILINX_AXIEMAC_BASEADDR) 99 # define CONFIG_XILINX_AXIEMAC 1 100 # define CONFIG_SYS_ENET 101 #endif 102 103 #undef ET_DEBUG 104 105 /* gpio */ 106 #ifdef XILINX_GPIO_BASEADDR 107 # define CONFIG_SYS_GPIO_0 1 108 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR 109 #endif 110 111 /* interrupt controller */ 112 #ifdef XILINX_INTC_BASEADDR 113 # define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR 114 # define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS 115 #endif 116 117 /* timer */ 118 #ifdef XILINX_TIMER_BASEADDR 119 # if (XILINX_TIMER_IRQ != -1) 120 # define CONFIG_SYS_TIMER_0 1 121 # define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR 122 # define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ 123 # define FREQUENCE XILINX_CLOCK_FREQ 124 # define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 ) 125 # endif 126 #elif XILINX_CLOCK_FREQ 127 # define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ 128 #else 129 # error BAD CLOCK FREQ 130 #endif 131 /* FSL */ 132 /* #define CONFIG_SYS_FSL_2 */ 133 /* #define FSL_INTR_2 1 */ 134 135 /* 136 * memory layout - Example 137 * CONFIG_SYS_TEXT_BASE = 0x1200_0000; defined in config.mk 138 * CONFIG_SYS_SRAM_BASE = 0x1000_0000; 139 * CONFIG_SYS_SRAM_SIZE = 0x0400_0000; 64MB 140 * 141 * CONFIG_SYS_MONITOR_LEN = 0x40000 142 * CONFIG_SYS_MALLOC_LEN = 3 * CONFIG_SYS_MONITOR_LEN = 0xC0000 143 * 144 * CONFIG_SYS_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000 145 * CONFIG_SYS_MONITOR_BASE = 0x13FF_F000 - CONFIG_SYS_MONITOR_LEN = 0x13FB_F000 146 * CONFIG_SYS_MALLOC_BASE = 0x13FB_F000 - CONFIG_SYS_MALLOC_LEN = 0x13EF_F000 147 * 148 * 0x1000_0000 CONFIG_SYS_SDRAM_BASE 149 * MEMTEST_AREA 64kB 150 * FREE 151 * 0x1200_0000 CONFIG_SYS_TEXT_BASE 152 * U-BOOT code 153 * 0x1202_0000 154 * FREE 155 * 156 * STACK 157 * 0x13EF_F000 CONFIG_SYS_MALLOC_BASE 158 * MALLOC_AREA 768kB Alloc 159 * 0x13FB_F000 CONFIG_SYS_MONITOR_BASE 160 * MONITOR_CODE 256kB Env 161 * 0x13FF_F000 CONFIG_SYS_GBL_DATA_OFFSET 162 * GLOBAL_DATA 4kB bd, gd 163 * 0x1400_0000 CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE 164 */ 165 166 /* ddr sdram - main memory */ 167 #define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START 168 #define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE 169 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 170 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) 171 172 /* global pointer */ 173 /* start of global data */ 174 #define CONFIG_SYS_GBL_DATA_OFFSET \ 175 (CONFIG_SYS_SDRAM_SIZE - GENERATED_GBL_DATA_SIZE) 176 177 /* monitor code */ 178 #define SIZE 0x40000 179 #define CONFIG_SYS_MONITOR_LEN SIZE 180 #define CONFIG_SYS_MONITOR_BASE \ 181 (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET \ 182 - CONFIG_SYS_MONITOR_LEN - GENERATED_BD_INFO_SIZE) 183 #define CONFIG_SYS_MONITOR_END \ 184 (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 185 #define CONFIG_SYS_MALLOC_LEN (SIZE * 3) 186 #define CONFIG_SYS_MALLOC_BASE \ 187 (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) 188 189 /* stack */ 190 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MALLOC_BASE 191 192 /* 193 * CFI flash memory layout - Example 194 * CONFIG_SYS_FLASH_BASE = 0x2200_0000; 195 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB 196 * 197 * SECT_SIZE = 0x20000; 128kB is one sector 198 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store 199 * 200 * 0x2200_0000 CONFIG_SYS_FLASH_BASE 201 * FREE 256kB 202 * 0x2204_0000 CONFIG_ENV_ADDR 203 * ENV_AREA 128kB 204 * 0x2206_0000 205 * FREE 206 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE 207 * 208 */ 209 210 #ifdef FLASH 211 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START 212 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE 213 # define CONFIG_SYS_FLASH_CFI 1 214 # define CONFIG_FLASH_CFI_DRIVER 1 215 /* ?empty sector */ 216 # define CONFIG_SYS_FLASH_EMPTY_INFO 1 217 /* max number of memory banks */ 218 # define CONFIG_SYS_MAX_FLASH_BANKS 1 219 /* max number of sectors on one chip */ 220 # define CONFIG_SYS_MAX_FLASH_SECT 512 221 /* hardware flash protection */ 222 # define CONFIG_SYS_FLASH_PROTECTION 223 224 # ifdef RAMENV 225 # define CONFIG_ENV_IS_NOWHERE 1 226 # define CONFIG_ENV_SIZE 0x1000 227 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 228 229 # else /* FLASH && !RAMENV */ 230 # define CONFIG_ENV_IS_IN_FLASH 1 231 /* 128K(one sector) for env */ 232 # define CONFIG_ENV_SECT_SIZE 0x20000 233 # define CONFIG_ENV_ADDR \ 234 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) 235 # define CONFIG_ENV_SIZE 0x20000 236 # endif /* FLASH && !RAMBOOT */ 237 #else /* !FLASH */ 238 239 #ifdef SPIFLASH 240 # define CONFIG_SYS_NO_FLASH 1 241 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR 242 # define CONFIG_XILINX_SPI 1 243 # define CONFIG_SPI 1 244 # define CONFIG_SPI_FLASH 1 245 # define CONFIG_SPI_FLASH_STMICRO 1 246 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 247 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ 248 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS 249 250 # ifdef RAMENV 251 # define CONFIG_ENV_IS_NOWHERE 1 252 # define CONFIG_ENV_SIZE 0x1000 253 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 254 255 # else /* SPIFLASH && !RAMENV */ 256 # define CONFIG_ENV_IS_IN_SPI_FLASH 1 257 # define CONFIG_ENV_SPI_MODE SPI_MODE_3 258 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 259 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 260 /* 128K(two sectors) for env */ 261 # define CONFIG_ENV_SECT_SIZE 0x10000 262 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE) 263 /* Warning: adjust the offset in respect of other flash content and size */ 264 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */ 265 # endif /* SPIFLASH && !RAMBOOT */ 266 #else /* !SPIFLASH */ 267 268 /* ENV in RAM */ 269 # define CONFIG_SYS_NO_FLASH 1 270 # define CONFIG_ENV_IS_NOWHERE 1 271 # define CONFIG_ENV_SIZE 0x1000 272 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 273 #endif /* !SPIFLASH */ 274 #endif /* !FLASH */ 275 276 /* system ace */ 277 #ifdef XILINX_SYSACE_BASEADDR 278 # define CONFIG_SYSTEMACE 279 /* #define DEBUG_SYSTEMACE */ 280 # define SYSTEMACE_CONFIG_FPGA 281 # define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR 282 # define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH 283 # define CONFIG_DOS_PARTITION 284 #endif 285 286 #if defined(XILINX_USE_ICACHE) 287 # define CONFIG_ICACHE 288 #else 289 # undef CONFIG_ICACHE 290 #endif 291 292 #if defined(XILINX_USE_DCACHE) 293 # define CONFIG_DCACHE 294 #else 295 # undef CONFIG_DCACHE 296 #endif 297 298 /* 299 * BOOTP options 300 */ 301 #define CONFIG_BOOTP_BOOTFILESIZE 302 #define CONFIG_BOOTP_BOOTPATH 303 #define CONFIG_BOOTP_GATEWAY 304 #define CONFIG_BOOTP_HOSTNAME 305 306 /* 307 * Command line configuration. 308 */ 309 #include <config_cmd_default.h> 310 311 #define CONFIG_CMD_ASKENV 312 #define CONFIG_CMD_IRQ 313 #define CONFIG_CMD_MFSL 314 #define CONFIG_CMD_ECHO 315 316 #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE) 317 # define CONFIG_CMD_CACHE 318 #else 319 # undef CONFIG_CMD_CACHE 320 #endif 321 322 #ifndef CONFIG_SYS_ENET 323 # undef CONFIG_CMD_NET 324 # undef CONFIG_CMD_NFS 325 #else 326 # define CONFIG_CMD_PING 327 # define CONFIG_CMD_DHCP 328 # define CONFIG_CMD_TFTPPUT 329 #endif 330 331 #if defined(CONFIG_SYSTEMACE) 332 # define CONFIG_CMD_EXT2 333 # define CONFIG_CMD_FAT 334 #endif 335 336 #if defined(FLASH) 337 # define CONFIG_CMD_ECHO 338 # define CONFIG_CMD_FLASH 339 # define CONFIG_CMD_IMLS 340 # define CONFIG_CMD_JFFS2 341 # define CONFIG_CMD_UBI 342 # undef CONFIG_CMD_UBIFS 343 344 # if !defined(RAMENV) 345 # define CONFIG_CMD_SAVEENV 346 # define CONFIG_CMD_SAVES 347 # endif 348 349 #else 350 #if defined(SPIFLASH) 351 # define CONFIG_CMD_SF 352 353 # if !defined(RAMENV) 354 # define CONFIG_CMD_SAVEENV 355 # define CONFIG_CMD_SAVES 356 # endif 357 #else 358 # undef CONFIG_CMD_IMLS 359 # undef CONFIG_CMD_FLASH 360 # undef CONFIG_CMD_JFFS2 361 # undef CONFIG_CMD_UBI 362 # undef CONFIG_CMD_UBIFS 363 #endif 364 #endif 365 366 #if defined(CONFIG_CMD_JFFS2) 367 # define CONFIG_MTD_PARTITIONS 368 #endif 369 370 #if defined(CONFIG_CMD_UBIFS) 371 # define CONFIG_CMD_UBI 372 # define CONFIG_LZO 373 #endif 374 375 #if defined(CONFIG_CMD_UBI) 376 # define CONFIG_MTD_PARTITIONS 377 # define CONFIG_RBTREE 378 #endif 379 380 #if defined(CONFIG_MTD_PARTITIONS) 381 /* MTD partitions */ 382 #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */ 383 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 384 #define CONFIG_FLASH_CFI_MTD 385 #define MTDIDS_DEFAULT "nor0=flash-0" 386 387 /* default mtd partition table */ 388 #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\ 389 "256k(env),3m(kernel),1m(romfs),"\ 390 "1m(cramfs),-(jffs2)" 391 #endif 392 393 /* Miscellaneous configurable options */ 394 #define CONFIG_SYS_PROMPT "U-Boot-mONStR> " 395 /* size of console buffer */ 396 #define CONFIG_SYS_CBSIZE 512 397 /* print buffer size */ 398 #define CONFIG_SYS_PBSIZE \ 399 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 400 /* max number of command args */ 401 #define CONFIG_SYS_MAXARGS 15 402 #define CONFIG_SYS_LONGHELP 403 /* default load address */ 404 #define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START 405 406 #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */ 407 #define CONFIG_BOOTARGS "root=romfs" 408 #define CONFIG_HOSTNAME XILINX_BOARD_NAME 409 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" 410 #define CONFIG_IPADDR 192.168.0.3 411 #define CONFIG_SERVERIP 192.168.0.5 412 #define CONFIG_GATEWAYIP 192.168.0.1 413 #define CONFIG_ETHADDR 00:E0:0C:00:00:FD 414 415 /* architecture dependent code */ 416 #define CONFIG_SYS_USR_EXCEP /* user exception */ 417 #define CONFIG_SYS_HZ 1000 418 419 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" 420 421 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \ 422 "nor0=flash-0\0"\ 423 "mtdparts=mtdparts=flash-0:"\ 424 "256k(u-boot),256k(env),3m(kernel),"\ 425 "1m(romfs),1m(cramfs),-(jffs2)\0" 426 427 #define CONFIG_CMDLINE_EDITING 428 429 /* Use the HUSH parser */ 430 #define CONFIG_SYS_HUSH_PARSER 431 432 /* Enable flat device tree support */ 433 #define CONFIG_LMB 1 434 #define CONFIG_FIT 1 435 #define CONFIG_OF_LIBFDT 1 436 437 #if defined(CONFIG_XILINX_LL_TEMAC) || defined(CONFIG_XILINX_AXIEMAC) 438 # define CONFIG_MII 1 439 # define CONFIG_CMD_MII 1 440 # define CONFIG_PHY_GIGE 1 441 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 442 # define CONFIG_PHYLIB 1 443 # define CONFIG_PHY_ATHEROS 1 444 # define CONFIG_PHY_BROADCOM 1 445 # define CONFIG_PHY_DAVICOM 1 446 # define CONFIG_PHY_LXT 1 447 # define CONFIG_PHY_MARVELL 1 448 # define CONFIG_PHY_MICREL 1 449 # define CONFIG_PHY_NATSEMI 1 450 # define CONFIG_PHY_REALTEK 1 451 # define CONFIG_PHY_VITESSE 1 452 #else 453 # undef CONFIG_MII 454 # undef CONFIG_CMD_MII 455 # undef CONFIG_PHYLIB 456 #endif 457 458 #endif /* __CONFIG_H */ 459