1 /*
2  * (C) Copyright 2007-2010 Michal Simek
3  *
4  * Michal SIMEK <monstr@monstr.eu>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11 
12 #include "../board/xilinx/microblaze-generic/xparameters.h"
13 
14 /* MicroBlaze CPU */
15 #define	MICROBLAZE_V5		1
16 
17 /* linear and spi flash memory */
18 #ifdef XILINX_FLASH_START
19 #define	FLASH
20 #undef	SPIFLASH
21 #undef	RAMENV	/* hold environment in flash */
22 #else
23 #ifdef XILINX_SPI_FLASH_BASEADDR
24 #undef	FLASH
25 #define	SPIFLASH
26 #undef	RAMENV	/* hold environment in flash */
27 #else
28 #undef	FLASH
29 #undef	SPIFLASH
30 #define	RAMENV	/* hold environment in RAM */
31 #endif
32 #endif
33 
34 /* uart */
35 /* The following table includes the supported baudrates */
36 # define CONFIG_SYS_BAUDRATE_TABLE \
37 	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
38 
39 /* setting reset address */
40 /*#define	CONFIG_SYS_RESET_ADDRESS	CONFIG_SYS_TEXT_BASE*/
41 
42 /* gpio */
43 #ifdef XILINX_GPIO_BASEADDR
44 # define CONFIG_XILINX_GPIO
45 # define CONFIG_SYS_GPIO_0_ADDR		XILINX_GPIO_BASEADDR
46 #endif
47 
48 /* watchdog */
49 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
50 # define CONFIG_WATCHDOG_BASEADDR	XILINX_WATCHDOG_BASEADDR
51 # define CONFIG_WATCHDOG_IRQ		XILINX_WATCHDOG_IRQ
52 # ifndef CONFIG_SPL_BUILD
53 #  define CONFIG_HW_WATCHDOG
54 #  define CONFIG_XILINX_TB_WATCHDOG
55 # endif
56 #endif
57 
58 #define CONFIG_SYS_MALLOC_LEN	0xC0000
59 
60 /* Stack location before relocation */
61 #define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_TEXT_BASE - \
62 					 CONFIG_SYS_MALLOC_F_LEN)
63 
64 /*
65  * CFI flash memory layout - Example
66  * CONFIG_SYS_FLASH_BASE = 0x2200_0000;
67  * CONFIG_SYS_FLASH_SIZE = 0x0080_0000;	  8MB
68  *
69  * SECT_SIZE = 0x20000;			128kB is one sector
70  * CONFIG_ENV_SIZE = SECT_SIZE;		128kB environment store
71  *
72  * 0x2200_0000	CONFIG_SYS_FLASH_BASE
73  *					FREE		256kB
74  * 0x2204_0000	CONFIG_ENV_ADDR
75  *					ENV_AREA	128kB
76  * 0x2206_0000
77  *					FREE
78  * 0x2280_0000	CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE
79  *
80  */
81 
82 #ifdef FLASH
83 # define CONFIG_SYS_FLASH_BASE		XILINX_FLASH_START
84 # define CONFIG_SYS_FLASH_SIZE		XILINX_FLASH_SIZE
85 # define CONFIG_SYS_FLASH_CFI		1
86 # define CONFIG_FLASH_CFI_DRIVER	1
87 /* ?empty sector */
88 # define CONFIG_SYS_FLASH_EMPTY_INFO	1
89 /* max number of memory banks */
90 # define CONFIG_SYS_MAX_FLASH_BANKS	1
91 /* max number of sectors on one chip */
92 # define CONFIG_SYS_MAX_FLASH_SECT	512
93 /* hardware flash protection */
94 # define CONFIG_SYS_FLASH_PROTECTION
95 /* use buffered writes (20x faster) */
96 # define	CONFIG_SYS_FLASH_USE_BUFFER_WRITE	1
97 # ifdef	RAMENV
98 #  define CONFIG_ENV_SIZE	0x1000
99 #  define CONFIG_ENV_ADDR	(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
100 
101 # else	/* FLASH && !RAMENV */
102 #  define CONFIG_ENV_IS_IN_FLASH	1
103 /* 128K(one sector) for env */
104 #  define CONFIG_ENV_SECT_SIZE	0x20000
105 #  define CONFIG_ENV_ADDR \
106 			(CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
107 #  define CONFIG_ENV_SIZE	0x20000
108 # endif /* FLASH && !RAMBOOT */
109 #else /* !FLASH */
110 
111 #ifdef SPIFLASH
112 # define CONFIG_SYS_SPI_BASE		XILINX_SPI_FLASH_BASEADDR
113 # define CONFIG_SPI			1
114 # define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
115 # define CONFIG_SF_DEFAULT_SPEED	XILINX_SPI_FLASH_MAX_FREQ
116 # define CONFIG_SF_DEFAULT_CS		XILINX_SPI_FLASH_CS
117 
118 # ifdef	RAMENV
119 #  define CONFIG_ENV_SIZE	0x1000
120 #  define CONFIG_ENV_ADDR	(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
121 
122 # else	/* SPIFLASH && !RAMENV */
123 #  define CONFIG_ENV_IS_IN_SPI_FLASH	1
124 #  define CONFIG_ENV_SPI_MODE		SPI_MODE_3
125 #  define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
126 #  define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
127 /* 128K(two sectors) for env */
128 #  define CONFIG_ENV_SECT_SIZE	0x10000
129 #  define CONFIG_ENV_SIZE	(2 * CONFIG_ENV_SECT_SIZE)
130 /* Warning: adjust the offset in respect of other flash content and size */
131 #  define CONFIG_ENV_OFFSET	(128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */
132 # endif /* SPIFLASH && !RAMBOOT */
133 #else /* !SPIFLASH */
134 
135 /* ENV in RAM */
136 # define CONFIG_ENV_SIZE	0x1000
137 # define CONFIG_ENV_ADDR	(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
138 #endif /* !SPIFLASH */
139 #endif /* !FLASH */
140 
141 #if defined(XILINX_USE_ICACHE)
142 # define CONFIG_ICACHE
143 #else
144 # undef CONFIG_ICACHE
145 #endif
146 
147 #if defined(XILINX_USE_DCACHE)
148 # define CONFIG_DCACHE
149 #else
150 # undef CONFIG_DCACHE
151 #endif
152 
153 #ifndef XILINX_DCACHE_BYTE_SIZE
154 #define XILINX_DCACHE_BYTE_SIZE	32768
155 #endif
156 
157 /*
158  * BOOTP options
159  */
160 #define CONFIG_BOOTP_BOOTFILESIZE
161 #define CONFIG_BOOTP_BOOTPATH
162 #define CONFIG_BOOTP_GATEWAY
163 #define CONFIG_BOOTP_HOSTNAME
164 
165 /*
166  * Command line configuration.
167  */
168 #define CONFIG_CMD_MFSL
169 
170 #if defined(FLASH)
171 # if !defined(RAMENV)
172 #  define CONFIG_CMD_SAVES
173 # endif
174 
175 #else
176 #if defined(SPIFLASH)
177 
178 # if !defined(RAMENV)
179 #  define CONFIG_CMD_SAVES
180 # endif
181 #endif
182 #endif
183 
184 #if defined(CONFIG_CMD_JFFS2)
185 # define CONFIG_MTD_PARTITIONS
186 #endif
187 
188 #if defined(CONFIG_CMD_UBI)
189 # define CONFIG_MTD_PARTITIONS
190 #endif
191 
192 #if defined(CONFIG_MTD_PARTITIONS)
193 /* MTD partitions */
194 #define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
195 #define CONFIG_FLASH_CFI_MTD
196 #define MTDIDS_DEFAULT		"nor0=flash-0"
197 
198 /* default mtd partition table */
199 #define MTDPARTS_DEFAULT	"mtdparts=flash-0:256k(u-boot),"\
200 				"256k(env),3m(kernel),1m(romfs),"\
201 				"1m(cramfs),-(jffs2)"
202 #endif
203 
204 /* size of console buffer */
205 #define	CONFIG_SYS_CBSIZE	512
206  /* print buffer size */
207 #define	CONFIG_SYS_PBSIZE \
208 		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
209 /* max number of command args */
210 #define	CONFIG_SYS_MAXARGS	15
211 #define	CONFIG_SYS_LONGHELP
212 /* default load address */
213 #define	CONFIG_SYS_LOAD_ADDR	0
214 
215 #define	CONFIG_BOOTARGS		"root=romfs"
216 #define	CONFIG_HOSTNAME		XILINX_BOARD_NAME
217 #define	CONFIG_BOOTCOMMAND	"base 0;tftp 11000000 image.img;bootm"
218 
219 /* architecture dependent code */
220 #define	CONFIG_SYS_USR_EXCEP	/* user exception */
221 
222 #define	CONFIG_PREBOOT	"echo U-BOOT for ${hostname};setenv preboot;echo"
223 
224 #ifndef CONFIG_EXTRA_ENV_SETTINGS
225 #define	CONFIG_EXTRA_ENV_SETTINGS	"unlock=yes\0" \
226 					"nor0=flash-0\0"\
227 					"mtdparts=mtdparts=flash-0:"\
228 					"256k(u-boot),256k(env),3m(kernel),"\
229 					"1m(romfs),1m(cramfs),-(jffs2)\0"\
230 					"nc=setenv stdout nc;"\
231 					"setenv stdin nc\0" \
232 					"serial=setenv stdout serial;"\
233 					"setenv stdin serial\0"
234 #endif
235 
236 #define CONFIG_CMDLINE_EDITING
237 
238 /* Enable flat device tree support */
239 #define CONFIG_LMB		1
240 
241 #if defined(CONFIG_XILINX_AXIEMAC)
242 # define CONFIG_MII		1
243 # define CONFIG_PHY_GIGE	1
244 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	1
245 # define CONFIG_PHY_ATHEROS	1
246 # define CONFIG_PHY_BROADCOM	1
247 # define CONFIG_PHY_DAVICOM	1
248 # define CONFIG_PHY_LXT		1
249 # define CONFIG_PHY_MARVELL	1
250 # define CONFIG_PHY_MICREL	1
251 # define CONFIG_PHY_MICREL_KSZ9021
252 # define CONFIG_PHY_NATSEMI	1
253 # define CONFIG_PHY_REALTEK	1
254 # define CONFIG_PHY_VITESSE	1
255 #else
256 # undef CONFIG_MII
257 #endif
258 
259 /* SPL part */
260 #define CONFIG_CMD_SPL
261 #define CONFIG_SPL_FRAMEWORK
262 
263 #define CONFIG_SPL_LDSCRIPT	"arch/microblaze/cpu/u-boot-spl.lds"
264 
265 #ifdef CONFIG_SYS_FLASH_BASE
266 # define CONFIG_SYS_UBOOT_BASE		CONFIG_SYS_FLASH_BASE
267 #endif
268 
269 /* for booting directly linux */
270 
271 #define CONFIG_SYS_FDT_BASE		(CONFIG_SYS_FLASH_BASE + \
272 					 0x40000)
273 #define CONFIG_SYS_FDT_SIZE		(16<<10)
274 #define CONFIG_SYS_SPL_ARGS_ADDR	(CONFIG_SYS_TEXT_BASE + \
275 					 0x1000000)
276 
277 /* SP location before relocation, must use scratch RAM */
278 /* BRAM start */
279 #define CONFIG_SYS_INIT_RAM_ADDR	0x0
280 /* BRAM size - will be generated */
281 #define CONFIG_SYS_INIT_RAM_SIZE	0x100000
282 
283 # define CONFIG_SPL_STACK_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
284 					 CONFIG_SYS_INIT_RAM_SIZE - \
285 					 CONFIG_SYS_MALLOC_F_LEN)
286 
287 /* Just for sure that there is a space for stack */
288 #define CONFIG_SPL_STACK_SIZE		0x100
289 
290 #define CONFIG_SYS_UBOOT_START		CONFIG_SYS_TEXT_BASE
291 
292 #define CONFIG_SPL_MAX_FOOTPRINT	(CONFIG_SYS_INIT_RAM_SIZE - \
293 					 CONFIG_SYS_INIT_RAM_ADDR - \
294 					 CONFIG_SYS_MALLOC_F_LEN - \
295 					 CONFIG_SPL_STACK_SIZE)
296 
297 #endif	/* __CONFIG_H */
298