1 /* 2 * (C) Copyright 2007-2010 Michal Simek 3 * 4 * Michal SIMEK <monstr@monstr.eu> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include "../board/xilinx/microblaze-generic/xparameters.h" 13 14 /* MicroBlaze CPU */ 15 #define MICROBLAZE_V5 1 16 17 /* linear and spi flash memory */ 18 #ifdef XILINX_FLASH_START 19 #define FLASH 20 #undef SPIFLASH 21 #undef RAMENV /* hold environment in flash */ 22 #else 23 #ifdef XILINX_SPI_FLASH_BASEADDR 24 #undef FLASH 25 #define SPIFLASH 26 #undef RAMENV /* hold environment in flash */ 27 #else 28 #undef FLASH 29 #undef SPIFLASH 30 #define RAMENV /* hold environment in RAM */ 31 #endif 32 #endif 33 34 /* uart */ 35 /* The following table includes the supported baudrates */ 36 # define CONFIG_SYS_BAUDRATE_TABLE \ 37 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 38 39 /* setting reset address */ 40 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ 41 42 /* gpio */ 43 #ifdef XILINX_GPIO_BASEADDR 44 # define CONFIG_XILINX_GPIO 45 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR 46 #endif 47 48 /* watchdog */ 49 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ) 50 # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR 51 # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ 52 # ifndef CONFIG_SPL_BUILD 53 # define CONFIG_HW_WATCHDOG 54 # define CONFIG_XILINX_TB_WATCHDOG 55 # endif 56 #endif 57 58 #define CONFIG_SYS_MALLOC_LEN 0xC0000 59 60 /* Stack location before relocation */ 61 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \ 62 CONFIG_SYS_MALLOC_F_LEN) 63 64 /* 65 * CFI flash memory layout - Example 66 * CONFIG_SYS_FLASH_BASE = 0x2200_0000; 67 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB 68 * 69 * SECT_SIZE = 0x20000; 128kB is one sector 70 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store 71 * 72 * 0x2200_0000 CONFIG_SYS_FLASH_BASE 73 * FREE 256kB 74 * 0x2204_0000 CONFIG_ENV_ADDR 75 * ENV_AREA 128kB 76 * 0x2206_0000 77 * FREE 78 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE 79 * 80 */ 81 82 #ifdef FLASH 83 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START 84 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE 85 # define CONFIG_SYS_FLASH_CFI 1 86 # define CONFIG_FLASH_CFI_DRIVER 1 87 /* ?empty sector */ 88 # define CONFIG_SYS_FLASH_EMPTY_INFO 1 89 /* max number of memory banks */ 90 # define CONFIG_SYS_MAX_FLASH_BANKS 1 91 /* max number of sectors on one chip */ 92 # define CONFIG_SYS_MAX_FLASH_SECT 512 93 /* hardware flash protection */ 94 # define CONFIG_SYS_FLASH_PROTECTION 95 /* use buffered writes (20x faster) */ 96 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 97 # ifdef RAMENV 98 # define CONFIG_ENV_IS_NOWHERE 1 99 # define CONFIG_ENV_SIZE 0x1000 100 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 101 102 # else /* FLASH && !RAMENV */ 103 # define CONFIG_ENV_IS_IN_FLASH 1 104 /* 128K(one sector) for env */ 105 # define CONFIG_ENV_SECT_SIZE 0x20000 106 # define CONFIG_ENV_ADDR \ 107 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) 108 # define CONFIG_ENV_SIZE 0x20000 109 # endif /* FLASH && !RAMBOOT */ 110 #else /* !FLASH */ 111 112 #ifdef SPIFLASH 113 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR 114 # define CONFIG_SPI 1 115 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 116 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ 117 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS 118 119 # ifdef RAMENV 120 # define CONFIG_ENV_IS_NOWHERE 1 121 # define CONFIG_ENV_SIZE 0x1000 122 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 123 124 # else /* SPIFLASH && !RAMENV */ 125 # define CONFIG_ENV_IS_IN_SPI_FLASH 1 126 # define CONFIG_ENV_SPI_MODE SPI_MODE_3 127 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 128 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 129 /* 128K(two sectors) for env */ 130 # define CONFIG_ENV_SECT_SIZE 0x10000 131 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE) 132 /* Warning: adjust the offset in respect of other flash content and size */ 133 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */ 134 # endif /* SPIFLASH && !RAMBOOT */ 135 #else /* !SPIFLASH */ 136 137 /* ENV in RAM */ 138 # define CONFIG_ENV_IS_NOWHERE 1 139 # define CONFIG_ENV_SIZE 0x1000 140 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 141 #endif /* !SPIFLASH */ 142 #endif /* !FLASH */ 143 144 #if defined(XILINX_USE_ICACHE) 145 # define CONFIG_ICACHE 146 #else 147 # undef CONFIG_ICACHE 148 #endif 149 150 #if defined(XILINX_USE_DCACHE) 151 # define CONFIG_DCACHE 152 #else 153 # undef CONFIG_DCACHE 154 #endif 155 156 #ifndef XILINX_DCACHE_BYTE_SIZE 157 #define XILINX_DCACHE_BYTE_SIZE 32768 158 #endif 159 160 /* 161 * BOOTP options 162 */ 163 #define CONFIG_BOOTP_BOOTFILESIZE 164 #define CONFIG_BOOTP_BOOTPATH 165 #define CONFIG_BOOTP_GATEWAY 166 #define CONFIG_BOOTP_HOSTNAME 167 168 /* 169 * Command line configuration. 170 */ 171 #define CONFIG_CMD_IRQ 172 #define CONFIG_CMD_MFSL 173 174 #if defined(FLASH) 175 # define CONFIG_CMD_JFFS2 176 # undef CONFIG_CMD_UBIFS 177 178 # if !defined(RAMENV) 179 # define CONFIG_CMD_SAVES 180 # endif 181 182 #else 183 #if defined(SPIFLASH) 184 185 # if !defined(RAMENV) 186 # define CONFIG_CMD_SAVES 187 # endif 188 #else 189 # undef CONFIG_CMD_JFFS2 190 # undef CONFIG_CMD_UBIFS 191 #endif 192 #endif 193 194 #if defined(CONFIG_CMD_JFFS2) 195 # define CONFIG_MTD_PARTITIONS 196 #endif 197 198 #if defined(CONFIG_CMD_UBIFS) 199 # define CONFIG_LZO 200 #endif 201 202 #if defined(CONFIG_CMD_UBI) 203 # define CONFIG_MTD_PARTITIONS 204 # define CONFIG_RBTREE 205 #endif 206 207 #if defined(CONFIG_MTD_PARTITIONS) 208 /* MTD partitions */ 209 #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */ 210 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 211 #define CONFIG_FLASH_CFI_MTD 212 #define MTDIDS_DEFAULT "nor0=flash-0" 213 214 /* default mtd partition table */ 215 #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\ 216 "256k(env),3m(kernel),1m(romfs),"\ 217 "1m(cramfs),-(jffs2)" 218 #endif 219 220 /* size of console buffer */ 221 #define CONFIG_SYS_CBSIZE 512 222 /* print buffer size */ 223 #define CONFIG_SYS_PBSIZE \ 224 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 225 /* max number of command args */ 226 #define CONFIG_SYS_MAXARGS 15 227 #define CONFIG_SYS_LONGHELP 228 /* default load address */ 229 #define CONFIG_SYS_LOAD_ADDR 0 230 231 #define CONFIG_BOOTARGS "root=romfs" 232 #define CONFIG_HOSTNAME XILINX_BOARD_NAME 233 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" 234 235 /* architecture dependent code */ 236 #define CONFIG_SYS_USR_EXCEP /* user exception */ 237 238 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" 239 240 #ifndef CONFIG_EXTRA_ENV_SETTINGS 241 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \ 242 "nor0=flash-0\0"\ 243 "mtdparts=mtdparts=flash-0:"\ 244 "256k(u-boot),256k(env),3m(kernel),"\ 245 "1m(romfs),1m(cramfs),-(jffs2)\0"\ 246 "nc=setenv stdout nc;"\ 247 "setenv stdin nc\0" \ 248 "serial=setenv stdout serial;"\ 249 "setenv stdin serial\0" 250 #endif 251 252 #define CONFIG_CMDLINE_EDITING 253 254 /* Enable flat device tree support */ 255 #define CONFIG_LMB 1 256 257 #if defined(CONFIG_XILINX_AXIEMAC) 258 # define CONFIG_MII 1 259 # define CONFIG_PHY_GIGE 1 260 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 261 # define CONFIG_PHY_ATHEROS 1 262 # define CONFIG_PHY_BROADCOM 1 263 # define CONFIG_PHY_DAVICOM 1 264 # define CONFIG_PHY_LXT 1 265 # define CONFIG_PHY_MARVELL 1 266 # define CONFIG_PHY_MICREL 1 267 # define CONFIG_PHY_MICREL_KSZ9021 268 # define CONFIG_PHY_NATSEMI 1 269 # define CONFIG_PHY_REALTEK 1 270 # define CONFIG_PHY_VITESSE 1 271 #else 272 # undef CONFIG_MII 273 #endif 274 275 /* SPL part */ 276 #define CONFIG_CMD_SPL 277 #define CONFIG_SPL_FRAMEWORK 278 #define CONFIG_SPL_BOARD_INIT 279 280 #define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds" 281 282 #ifdef CONFIG_SYS_FLASH_BASE 283 # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE 284 #endif 285 286 /* for booting directly linux */ 287 288 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ 289 0x40000) 290 #define CONFIG_SYS_FDT_SIZE (16<<10) 291 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \ 292 0x1000000) 293 294 /* SP location before relocation, must use scratch RAM */ 295 /* BRAM start */ 296 #define CONFIG_SYS_INIT_RAM_ADDR 0x0 297 /* BRAM size - will be generated */ 298 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000 299 300 # define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 301 CONFIG_SYS_INIT_RAM_SIZE - \ 302 CONFIG_SYS_MALLOC_F_LEN) 303 304 /* Just for sure that there is a space for stack */ 305 #define CONFIG_SPL_STACK_SIZE 0x100 306 307 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 308 309 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \ 310 CONFIG_SYS_INIT_RAM_ADDR - \ 311 CONFIG_SYS_MALLOC_F_LEN - \ 312 CONFIG_SPL_STACK_SIZE) 313 314 #endif /* __CONFIG_H */ 315