1 /* 2 * (C) Copyright 2007-2010 Michal Simek 3 * 4 * Michal SIMEK <monstr@monstr.eu> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include "../board/xilinx/microblaze-generic/xparameters.h" 13 14 /* MicroBlaze CPU */ 15 #define MICROBLAZE_V5 1 16 17 /* linear and spi flash memory */ 18 #ifdef XILINX_FLASH_START 19 #define FLASH 20 #undef SPIFLASH 21 #undef RAMENV /* hold environment in flash */ 22 #else 23 #ifdef XILINX_SPI_FLASH_BASEADDR 24 #undef FLASH 25 #define SPIFLASH 26 #undef RAMENV /* hold environment in flash */ 27 #else 28 #undef FLASH 29 #undef SPIFLASH 30 #define RAMENV /* hold environment in RAM */ 31 #endif 32 #endif 33 34 /* uart */ 35 #ifdef XILINX_UARTLITE_BASEADDR 36 # define CONFIG_XILINX_UARTLITE 37 # define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR 38 # define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE 39 # define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } 40 # define CONSOLE_ARG "console=console=ttyUL0,115200\0" 41 #elif XILINX_UART16550_BASEADDR 42 # define CONFIG_SYS_NS16550_SERIAL 43 # if defined(__MICROBLAZEEL__) 44 # define CONFIG_SYS_NS16550_REG_SIZE -4 45 # else 46 # define CONFIG_SYS_NS16550_REG_SIZE 4 47 # endif 48 # define CONFIG_CONS_INDEX 1 49 # define CONFIG_SYS_NS16550_COM1 \ 50 ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000) 51 # define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ 52 # define CONFIG_BAUDRATE 115200 53 54 /* The following table includes the supported baudrates */ 55 # define CONFIG_SYS_BAUDRATE_TABLE \ 56 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} 57 # define CONSOLE_ARG "console=console=ttyS0,115200\0" 58 #else 59 # error Undefined uart 60 #endif 61 62 /* setting reset address */ 63 /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ 64 65 /* ethernet */ 66 #undef CONFIG_SYS_ENET 67 #if defined(XILINX_EMACLITE_BASEADDR) || defined(CONFIG_OF_CONTROL) 68 # define CONFIG_XILINX_EMACLITE 1 69 # define CONFIG_SYS_ENET 70 #endif 71 #if defined(XILINX_AXIEMAC_BASEADDR) 72 # define CONFIG_XILINX_AXIEMAC 1 73 # define CONFIG_SYS_ENET 74 #endif 75 76 #undef ET_DEBUG 77 78 /* gpio */ 79 #ifdef XILINX_GPIO_BASEADDR 80 # define CONFIG_XILINX_GPIO 81 # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR 82 #endif 83 84 /* interrupt controller */ 85 #ifdef XILINX_INTC_BASEADDR 86 # define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR 87 # define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS 88 #endif 89 90 /* timer */ 91 #if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ) 92 # define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR 93 # define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ 94 #endif 95 96 /* watchdog */ 97 #if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ) 98 # define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR 99 # define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ 100 # ifndef CONFIG_SPL_BUILD 101 # define CONFIG_HW_WATCHDOG 102 # define CONFIG_XILINX_TB_WATCHDOG 103 # endif 104 #endif 105 106 #if !defined(CONFIG_OF_CONTROL) || \ 107 (defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_OF_CONTROL)) 108 /* ddr sdram - main memory */ 109 # define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START 110 # define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE 111 #endif 112 113 #define CONFIG_SYS_MALLOC_LEN 0xC0000 114 115 /* Stack location before relocation */ 116 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \ 117 CONFIG_SYS_MALLOC_F_LEN) 118 119 /* 120 * CFI flash memory layout - Example 121 * CONFIG_SYS_FLASH_BASE = 0x2200_0000; 122 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000; 8MB 123 * 124 * SECT_SIZE = 0x20000; 128kB is one sector 125 * CONFIG_ENV_SIZE = SECT_SIZE; 128kB environment store 126 * 127 * 0x2200_0000 CONFIG_SYS_FLASH_BASE 128 * FREE 256kB 129 * 0x2204_0000 CONFIG_ENV_ADDR 130 * ENV_AREA 128kB 131 * 0x2206_0000 132 * FREE 133 * 0x2280_0000 CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE 134 * 135 */ 136 137 #ifdef FLASH 138 # define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START 139 # define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE 140 # define CONFIG_SYS_FLASH_CFI 1 141 # define CONFIG_FLASH_CFI_DRIVER 1 142 /* ?empty sector */ 143 # define CONFIG_SYS_FLASH_EMPTY_INFO 1 144 /* max number of memory banks */ 145 # define CONFIG_SYS_MAX_FLASH_BANKS 1 146 /* max number of sectors on one chip */ 147 # define CONFIG_SYS_MAX_FLASH_SECT 512 148 /* hardware flash protection */ 149 # define CONFIG_SYS_FLASH_PROTECTION 150 /* use buffered writes (20x faster) */ 151 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 152 # ifdef RAMENV 153 # define CONFIG_ENV_IS_NOWHERE 1 154 # define CONFIG_ENV_SIZE 0x1000 155 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 156 157 # else /* FLASH && !RAMENV */ 158 # define CONFIG_ENV_IS_IN_FLASH 1 159 /* 128K(one sector) for env */ 160 # define CONFIG_ENV_SECT_SIZE 0x20000 161 # define CONFIG_ENV_ADDR \ 162 (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE)) 163 # define CONFIG_ENV_SIZE 0x20000 164 # endif /* FLASH && !RAMBOOT */ 165 #else /* !FLASH */ 166 167 #ifdef SPIFLASH 168 # define CONFIG_SYS_NO_FLASH 1 169 # define CONFIG_SYS_SPI_BASE XILINX_SPI_FLASH_BASEADDR 170 # define CONFIG_SPI 1 171 # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 172 # define CONFIG_SF_DEFAULT_SPEED XILINX_SPI_FLASH_MAX_FREQ 173 # define CONFIG_SF_DEFAULT_CS XILINX_SPI_FLASH_CS 174 175 # ifdef RAMENV 176 # define CONFIG_ENV_IS_NOWHERE 1 177 # define CONFIG_ENV_SIZE 0x1000 178 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 179 180 # else /* SPIFLASH && !RAMENV */ 181 # define CONFIG_ENV_IS_IN_SPI_FLASH 1 182 # define CONFIG_ENV_SPI_MODE SPI_MODE_3 183 # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 184 # define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 185 /* 128K(two sectors) for env */ 186 # define CONFIG_ENV_SECT_SIZE 0x10000 187 # define CONFIG_ENV_SIZE (2 * CONFIG_ENV_SECT_SIZE) 188 /* Warning: adjust the offset in respect of other flash content and size */ 189 # define CONFIG_ENV_OFFSET (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */ 190 # endif /* SPIFLASH && !RAMBOOT */ 191 #else /* !SPIFLASH */ 192 193 /* ENV in RAM */ 194 # define CONFIG_SYS_NO_FLASH 1 195 # define CONFIG_ENV_IS_NOWHERE 1 196 # define CONFIG_ENV_SIZE 0x1000 197 # define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) 198 #endif /* !SPIFLASH */ 199 #endif /* !FLASH */ 200 201 /* system ace */ 202 #ifdef XILINX_SYSACE_BASEADDR 203 # define CONFIG_SYSTEMACE 204 /* #define DEBUG_SYSTEMACE */ 205 # define SYSTEMACE_CONFIG_FPGA 206 # define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR 207 # define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH 208 # define CONFIG_DOS_PARTITION 209 #endif 210 211 #if defined(XILINX_USE_ICACHE) 212 # define CONFIG_ICACHE 213 #else 214 # undef CONFIG_ICACHE 215 #endif 216 217 #if defined(XILINX_USE_DCACHE) 218 # define CONFIG_DCACHE 219 #else 220 # undef CONFIG_DCACHE 221 #endif 222 223 #ifndef XILINX_DCACHE_BYTE_SIZE 224 #define XILINX_DCACHE_BYTE_SIZE 32768 225 #endif 226 227 /* 228 * BOOTP options 229 */ 230 #define CONFIG_BOOTP_BOOTFILESIZE 231 #define CONFIG_BOOTP_BOOTPATH 232 #define CONFIG_BOOTP_GATEWAY 233 #define CONFIG_BOOTP_HOSTNAME 234 235 /* 236 * Command line configuration. 237 */ 238 #define CONFIG_CMD_ASKENV 239 #define CONFIG_CMD_IRQ 240 #define CONFIG_CMD_MFSL 241 242 #if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE) 243 # define CONFIG_CMD_CACHE 244 #else 245 # undef CONFIG_CMD_CACHE 246 #endif 247 248 #ifdef CONFIG_SYS_ENET 249 # define CONFIG_CMD_PING 250 # define CONFIG_CMD_DHCP 251 # define CONFIG_CMD_TFTPPUT 252 #endif 253 254 #if defined(CONFIG_SYSTEMACE) 255 # define CONFIG_CMD_EXT2 256 # define CONFIG_CMD_FAT 257 #endif 258 259 #if defined(FLASH) 260 # define CONFIG_CMD_JFFS2 261 # define CONFIG_CMD_UBI 262 # undef CONFIG_CMD_UBIFS 263 264 # if !defined(RAMENV) 265 # define CONFIG_CMD_SAVES 266 # endif 267 268 #else 269 #if defined(SPIFLASH) 270 # define CONFIG_CMD_SF 271 272 # if !defined(RAMENV) 273 # define CONFIG_CMD_SAVES 274 # endif 275 #else 276 # undef CONFIG_CMD_JFFS2 277 # undef CONFIG_CMD_UBI 278 # undef CONFIG_CMD_UBIFS 279 #endif 280 #endif 281 282 #if defined(CONFIG_CMD_JFFS2) 283 # define CONFIG_MTD_PARTITIONS 284 #endif 285 286 #if defined(CONFIG_CMD_UBIFS) 287 # define CONFIG_CMD_UBI 288 # define CONFIG_LZO 289 #endif 290 291 #if defined(CONFIG_CMD_UBI) 292 # define CONFIG_MTD_PARTITIONS 293 # define CONFIG_RBTREE 294 #endif 295 296 #if defined(CONFIG_MTD_PARTITIONS) 297 /* MTD partitions */ 298 #define CONFIG_CMD_MTDPARTS /* mtdparts command line support */ 299 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 300 #define CONFIG_FLASH_CFI_MTD 301 #define MTDIDS_DEFAULT "nor0=flash-0" 302 303 /* default mtd partition table */ 304 #define MTDPARTS_DEFAULT "mtdparts=flash-0:256k(u-boot),"\ 305 "256k(env),3m(kernel),1m(romfs),"\ 306 "1m(cramfs),-(jffs2)" 307 #endif 308 309 /* size of console buffer */ 310 #define CONFIG_SYS_CBSIZE 512 311 /* print buffer size */ 312 #define CONFIG_SYS_PBSIZE \ 313 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 314 /* max number of command args */ 315 #define CONFIG_SYS_MAXARGS 15 316 #define CONFIG_SYS_LONGHELP 317 /* default load address */ 318 #define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START 319 320 #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */ 321 #define CONFIG_BOOTARGS "root=romfs" 322 #define CONFIG_HOSTNAME XILINX_BOARD_NAME 323 #define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm" 324 #define CONFIG_IPADDR 192.168.0.3 325 #define CONFIG_SERVERIP 192.168.0.5 326 #define CONFIG_GATEWAYIP 192.168.0.1 327 328 /* architecture dependent code */ 329 #define CONFIG_SYS_USR_EXCEP /* user exception */ 330 331 #define CONFIG_PREBOOT "echo U-BOOT for ${hostname};setenv preboot;echo" 332 333 #define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" \ 334 "nor0=flash-0\0"\ 335 "mtdparts=mtdparts=flash-0:"\ 336 "256k(u-boot),256k(env),3m(kernel),"\ 337 "1m(romfs),1m(cramfs),-(jffs2)\0"\ 338 "nc=setenv stdout nc;"\ 339 "setenv stdin nc\0" \ 340 "serial=setenv stdout serial;"\ 341 "setenv stdin serial\0" 342 343 #define CONFIG_CMDLINE_EDITING 344 345 #define CONFIG_NETCONSOLE 346 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 347 348 /* Use the HUSH parser */ 349 #define CONFIG_SYS_HUSH_PARSER 350 351 /* Enable flat device tree support */ 352 #define CONFIG_LMB 1 353 #define CONFIG_FIT 1 354 #define CONFIG_OF_LIBFDT 1 355 356 #if defined(CONFIG_XILINX_AXIEMAC) 357 # define CONFIG_MII 1 358 # define CONFIG_CMD_MII 1 359 # define CONFIG_PHY_GIGE 1 360 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 361 # define CONFIG_PHYLIB 1 362 # define CONFIG_PHY_ATHEROS 1 363 # define CONFIG_PHY_BROADCOM 1 364 # define CONFIG_PHY_DAVICOM 1 365 # define CONFIG_PHY_LXT 1 366 # define CONFIG_PHY_MARVELL 1 367 # define CONFIG_PHY_MICREL 1 368 # define CONFIG_PHY_NATSEMI 1 369 # define CONFIG_PHY_REALTEK 1 370 # define CONFIG_PHY_VITESSE 1 371 #else 372 # undef CONFIG_MII 373 # undef CONFIG_CMD_MII 374 # undef CONFIG_PHYLIB 375 #endif 376 377 /* SPL part */ 378 #define CONFIG_CMD_SPL 379 #define CONFIG_SPL_FRAMEWORK 380 #define CONFIG_SPL_LIBCOMMON_SUPPORT 381 #define CONFIG_SPL_LIBGENERIC_SUPPORT 382 #define CONFIG_SPL_SERIAL_SUPPORT 383 #define CONFIG_SPL_BOARD_INIT 384 385 #define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds" 386 387 #define CONFIG_SPL_RAM_DEVICE 388 #ifdef CONFIG_SYS_FLASH_BASE 389 # define CONFIG_SPL_NOR_SUPPORT 390 # define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE 391 #endif 392 393 /* for booting directly linux */ 394 #define CONFIG_SPL_OS_BOOT 395 396 #define CONFIG_SYS_OS_BASE (CONFIG_SYS_FLASH_BASE + \ 397 0x60000) 398 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ 399 0x40000) 400 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \ 401 0x1000000) 402 403 /* SP location before relocation, must use scratch RAM */ 404 /* BRAM start */ 405 #define CONFIG_SYS_INIT_RAM_ADDR 0x0 406 /* BRAM size - will be generated */ 407 #define CONFIG_SYS_INIT_RAM_SIZE 0x100000 408 409 # define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 410 CONFIG_SYS_INIT_RAM_SIZE - \ 411 CONFIG_SYS_MALLOC_F_LEN) 412 413 /* Just for sure that there is a space for stack */ 414 #define CONFIG_SPL_STACK_SIZE 0x100 415 416 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 417 418 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \ 419 CONFIG_SYS_INIT_RAM_ADDR - \ 420 CONFIG_SYS_MALLOC_F_LEN - \ 421 CONFIG_SPL_STACK_SIZE) 422 423 #endif /* __CONFIG_H */ 424