1 /* 2 * (C) Copyright 2007-2008 3 * Stelian Pop <stelian@popies.net> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * 6 * (C) Copyright 2009-2015 7 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu> 8 * esd electronic system design gmbh <www.esd.eu> 9 * 10 * Configuation settings for the esd MEESC board. 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 #ifndef __CONFIG_H 16 #define __CONFIG_H 17 18 /* 19 * SoC must be defined first, before hardware.h is included. 20 * In this case SoC is defined in boards.cfg. 21 */ 22 #include <asm/hardware.h> 23 24 /* 25 * Warning: changing CONFIG_SYS_TEXT_BASE requires 26 * adapting the initial boot program. 27 * Since the linker has to swallow that define, we must use a pure 28 * hex number here! 29 */ 30 #define CONFIG_SYS_TEXT_BASE 0x21F00000 31 32 /* 33 * since a number of boards are not being listed in linux 34 * arch/arm/tools/mach-types any more, the mach-types have to be 35 * defined here 36 */ 37 #define MACH_TYPE_MEESC 2165 38 #define MACH_TYPE_ETHERCAN2 2407 39 40 /* ARM asynchronous clock */ 41 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */ 42 #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */ 43 44 /* Misc CPU related */ 45 #define CONFIG_SKIP_LOWLEVEL_INIT 46 #define CONFIG_ARCH_CPU_INIT 47 #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ 48 #define CONFIG_SETUP_MEMORY_TAGS 49 #define CONFIG_INITRD_TAG 50 #define CONFIG_SERIAL_TAG 51 #define CONFIG_REVISION_TAG 52 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 53 #define CONFIG_MISC_INIT_R /* Call misc_init_r */ 54 55 #define CONFIG_PREBOOT /* enable preboot variable */ 56 57 /* 58 * Hardware drivers 59 */ 60 61 /* general purpose I/O */ 62 #define CONFIG_AT91_GPIO 63 64 /* Console output */ 65 #define CONFIG_ATMEL_USART 66 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 67 #define CONFIG_USART_ID ATMEL_ID_SYS 68 #define CONFIG_BAUDRATE 115200 69 70 /* 71 * BOOTP options 72 */ 73 #define CONFIG_BOOTP_BOOTFILESIZE 74 #define CONFIG_BOOTP_BOOTPATH 75 #define CONFIG_BOOTP_GATEWAY 76 #define CONFIG_BOOTP_HOSTNAME 77 78 /* 79 * Command line configuration. 80 */ 81 82 #ifdef CONFIG_SYS_USE_NANDFLASH 83 #define CONFIG_CMD_NAND 84 #endif 85 86 /* LED */ 87 #define CONFIG_AT91_LED 88 89 /* 90 * SDRAM: 1 bank, min 32, max 128 MB 91 * Initialized before u-boot gets started. 92 */ 93 #define PHYS_SDRAM ATMEL_BASE_CS1 /* 0x20000000 */ 94 #define PHYS_SDRAM_SIZE 0x02000000 /* 32 MByte */ 95 96 #define CONFIG_NR_DRAM_BANKS 1 97 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 98 #define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_SIZE 99 100 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000) 101 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000) 102 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000) 103 104 /* 105 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 106 * leaving the correct space for initial global data structure above 107 * that address while providing maximum stack area below. 108 */ 109 #define CONFIG_SYS_INIT_SP_ADDR \ 110 (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE) 111 112 /* DataFlash */ 113 #ifdef CONFIG_SYS_USE_DATAFLASH 114 # define CONFIG_ATMEL_DATAFLASH_SPI 115 # define CONFIG_HAS_DATAFLASH 116 # define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 117 # define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 118 # define AT91_SPI_CLK 15000000 119 # define DATAFLASH_TCSS (0x1a << 16) 120 # define DATAFLASH_TCHS (0x1 << 24) 121 #endif 122 123 /* NOR flash is not populated, disable it */ 124 #define CONFIG_SYS_NO_FLASH 125 126 /* NAND flash */ 127 #ifdef CONFIG_CMD_NAND 128 # define CONFIG_NAND_ATMEL 129 # define CONFIG_SYS_MAX_NAND_DEVICE 1 130 # define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 /* 0x40000000 */ 131 # define CONFIG_SYS_NAND_DBW_8 132 # define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 133 # define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 134 # define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) 135 # define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) 136 #endif 137 138 /* Ethernet */ 139 #define CONFIG_MACB 140 #define CONFIG_RMII 141 #define CONFIG_NET_RETRY_COUNT 20 142 #undef CONFIG_RESET_PHY_R 143 144 /* hw-controller addresses */ 145 #define CONFIG_ET1100_BASE 0x70000000 146 147 #ifdef CONFIG_SYS_USE_DATAFLASH 148 149 /* bootstrap + u-boot + env in dataflash on CS0 */ 150 # define CONFIG_ENV_IS_IN_DATAFLASH 151 # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 152 0x8400) 153 # define CONFIG_ENV_OFFSET 0x4200 154 # define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 155 CONFIG_ENV_OFFSET) 156 # define CONFIG_ENV_SIZE 0x4200 157 158 #elif CONFIG_SYS_USE_NANDFLASH 159 160 /* bootstrap + u-boot + env + linux in nandflash */ 161 # define CONFIG_ENV_IS_IN_NAND 1 162 # define CONFIG_ENV_OFFSET 0xC0000 163 # define CONFIG_ENV_SIZE 0x20000 164 165 #endif 166 167 #define CONFIG_SYS_CBSIZE 512 168 #define CONFIG_SYS_MAXARGS 16 169 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 170 sizeof(CONFIG_SYS_PROMPT) + 16) 171 #define CONFIG_SYS_LONGHELP 172 #define CONFIG_CMDLINE_EDITING 173 #define CONFIG_AUTO_COMPLETE 174 175 /* 176 * Size of malloc() pool 177 */ 178 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \ 179 128*1024, 0x1000) 180 181 #endif 182