1 /* 2 * (C) Copyright 2007-2008 3 * Stelian Pop <stelian@popies.net> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * 6 * (C) Copyright 2009-2015 7 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu> 8 * esd electronic system design gmbh <www.esd.eu> 9 * 10 * Configuation settings for the esd MEESC board. 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 #ifndef __CONFIG_H 16 #define __CONFIG_H 17 18 /* 19 * SoC must be defined first, before hardware.h is included. 20 * In this case SoC is defined in boards.cfg. 21 */ 22 #include <asm/hardware.h> 23 24 /* 25 * Warning: changing CONFIG_SYS_TEXT_BASE requires 26 * adapting the initial boot program. 27 * Since the linker has to swallow that define, we must use a pure 28 * hex number here! 29 */ 30 #define CONFIG_SYS_TEXT_BASE 0x21F00000 31 32 /* 33 * since a number of boards are not being listed in linux 34 * arch/arm/tools/mach-types any more, the mach-types have to be 35 * defined here 36 */ 37 #define MACH_TYPE_MEESC 2165 38 #define MACH_TYPE_ETHERCAN2 2407 39 40 /* ARM asynchronous clock */ 41 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */ 42 #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */ 43 44 /* Misc CPU related */ 45 #define CONFIG_SKIP_LOWLEVEL_INIT 46 #define CONFIG_ARCH_CPU_INIT 47 #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ 48 #define CONFIG_SETUP_MEMORY_TAGS 49 #define CONFIG_INITRD_TAG 50 #define CONFIG_SERIAL_TAG 51 #define CONFIG_REVISION_TAG 52 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 53 #define CONFIG_MISC_INIT_R /* Call misc_init_r */ 54 55 #define CONFIG_DISPLAY_BOARDINFO /* call checkboard() */ 56 #define CONFIG_DISPLAY_CPUINFO /* display cpu info and speed */ 57 #define CONFIG_PREBOOT /* enable preboot variable */ 58 59 /* 60 * Hardware drivers 61 */ 62 63 /* general purpose I/O */ 64 #define CONFIG_AT91_GPIO 65 66 /* Console output */ 67 #define CONFIG_ATMEL_USART 68 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 69 #define CONFIG_USART_ID ATMEL_ID_SYS 70 #define CONFIG_BAUDRATE 115200 71 72 #define CONFIG_BOOTDELAY 3 73 #define CONFIG_ZERO_BOOTDELAY_CHECK 74 75 /* 76 * BOOTP options 77 */ 78 #define CONFIG_BOOTP_BOOTFILESIZE 79 #define CONFIG_BOOTP_BOOTPATH 80 #define CONFIG_BOOTP_GATEWAY 81 #define CONFIG_BOOTP_HOSTNAME 82 83 /* 84 * Command line configuration. 85 */ 86 87 #ifdef CONFIG_SYS_USE_NANDFLASH 88 #define CONFIG_CMD_NAND 89 #endif 90 91 /* LED */ 92 #define CONFIG_AT91_LED 93 94 /* 95 * SDRAM: 1 bank, min 32, max 128 MB 96 * Initialized before u-boot gets started. 97 */ 98 #define PHYS_SDRAM ATMEL_BASE_CS1 /* 0x20000000 */ 99 #define PHYS_SDRAM_SIZE 0x02000000 /* 32 MByte */ 100 101 #define CONFIG_NR_DRAM_BANKS 1 102 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 103 #define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_SIZE 104 105 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000) 106 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000) 107 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000) 108 109 /* 110 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 111 * leaving the correct space for initial global data structure above 112 * that address while providing maximum stack area below. 113 */ 114 #define CONFIG_SYS_INIT_SP_ADDR \ 115 (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE) 116 117 /* DataFlash */ 118 #ifdef CONFIG_SYS_USE_DATAFLASH 119 # define CONFIG_ATMEL_DATAFLASH_SPI 120 # define CONFIG_HAS_DATAFLASH 121 # define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 122 # define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 123 # define AT91_SPI_CLK 15000000 124 # define DATAFLASH_TCSS (0x1a << 16) 125 # define DATAFLASH_TCHS (0x1 << 24) 126 #endif 127 128 /* NOR flash is not populated, disable it */ 129 #define CONFIG_SYS_NO_FLASH 130 131 /* NAND flash */ 132 #ifdef CONFIG_CMD_NAND 133 # define CONFIG_NAND_ATMEL 134 # define CONFIG_SYS_MAX_NAND_DEVICE 1 135 # define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 /* 0x40000000 */ 136 # define CONFIG_SYS_NAND_DBW_8 137 # define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 138 # define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 139 # define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) 140 # define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) 141 #endif 142 143 /* Ethernet */ 144 #define CONFIG_MACB 145 #define CONFIG_RMII 146 #define CONFIG_NET_RETRY_COUNT 20 147 #undef CONFIG_RESET_PHY_R 148 149 /* hw-controller addresses */ 150 #define CONFIG_ET1100_BASE 0x70000000 151 152 #ifdef CONFIG_SYS_USE_DATAFLASH 153 154 /* bootstrap + u-boot + env in dataflash on CS0 */ 155 # define CONFIG_ENV_IS_IN_DATAFLASH 156 # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 157 0x8400) 158 # define CONFIG_ENV_OFFSET 0x4200 159 # define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 160 CONFIG_ENV_OFFSET) 161 # define CONFIG_ENV_SIZE 0x4200 162 163 #elif CONFIG_SYS_USE_NANDFLASH 164 165 /* bootstrap + u-boot + env + linux in nandflash */ 166 # define CONFIG_ENV_IS_IN_NAND 1 167 # define CONFIG_ENV_OFFSET 0xC0000 168 # define CONFIG_ENV_SIZE 0x20000 169 170 #endif 171 172 #define CONFIG_SYS_CBSIZE 512 173 #define CONFIG_SYS_MAXARGS 16 174 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 175 sizeof(CONFIG_SYS_PROMPT) + 16) 176 #define CONFIG_SYS_LONGHELP 177 #define CONFIG_CMDLINE_EDITING 178 #define CONFIG_AUTO_COMPLETE 179 180 /* 181 * Size of malloc() pool 182 */ 183 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \ 184 128*1024, 0x1000) 185 186 #endif 187