1 /* 2 * (C) Copyright 2007-2008 3 * Stelian Pop <stelian@popies.net> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * 6 * (C) Copyright 2009-2015 7 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu> 8 * esd electronic system design gmbh <www.esd.eu> 9 * 10 * Configuation settings for the esd MEESC board. 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 #ifndef __CONFIG_H 16 #define __CONFIG_H 17 18 /* 19 * SoC must be defined first, before hardware.h is included. 20 * In this case SoC is defined in boards.cfg. 21 */ 22 #include <asm/hardware.h> 23 24 /* 25 * Warning: changing CONFIG_SYS_TEXT_BASE requires 26 * adapting the initial boot program. 27 * Since the linker has to swallow that define, we must use a pure 28 * hex number here! 29 */ 30 #define CONFIG_SYS_TEXT_BASE 0x21F00000 31 32 /* ARM asynchronous clock */ 33 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */ 34 #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */ 35 36 /* Misc CPU related */ 37 #define CONFIG_SKIP_LOWLEVEL_INIT 38 #define CONFIG_ARCH_CPU_INIT 39 #define CONFIG_SETUP_MEMORY_TAGS 40 #define CONFIG_INITRD_TAG 41 #define CONFIG_SERIAL_TAG 42 #define CONFIG_REVISION_TAG 43 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 44 #define CONFIG_MISC_INIT_R /* Call misc_init_r */ 45 46 #define CONFIG_PREBOOT /* enable preboot variable */ 47 48 /* 49 * Hardware drivers 50 */ 51 52 /* general purpose I/O */ 53 #define CONFIG_AT91_GPIO 54 55 /* Console output */ 56 #define CONFIG_ATMEL_USART 57 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 58 #define CONFIG_USART_ID ATMEL_ID_SYS 59 60 /* 61 * BOOTP options 62 */ 63 #define CONFIG_BOOTP_BOOTFILESIZE 64 #define CONFIG_BOOTP_BOOTPATH 65 #define CONFIG_BOOTP_GATEWAY 66 #define CONFIG_BOOTP_HOSTNAME 67 68 /* 69 * Command line configuration. 70 */ 71 72 #ifdef CONFIG_SYS_USE_NANDFLASH 73 #define CONFIG_CMD_NAND 74 #endif 75 76 /* LED */ 77 #define CONFIG_AT91_LED 78 79 /* 80 * SDRAM: 1 bank, min 32, max 128 MB 81 * Initialized before u-boot gets started. 82 */ 83 #define PHYS_SDRAM ATMEL_BASE_CS1 /* 0x20000000 */ 84 #define PHYS_SDRAM_SIZE 0x02000000 /* 32 MByte */ 85 86 #define CONFIG_NR_DRAM_BANKS 1 87 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 88 #define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_SIZE 89 90 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000) 91 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000) 92 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000) 93 94 /* 95 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 96 * leaving the correct space for initial global data structure above 97 * that address while providing maximum stack area below. 98 */ 99 #define CONFIG_SYS_INIT_SP_ADDR \ 100 (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE) 101 102 /* DataFlash */ 103 #ifdef CONFIG_SYS_USE_DATAFLASH 104 # define CONFIG_ATMEL_DATAFLASH_SPI 105 # define CONFIG_HAS_DATAFLASH 106 # define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 107 # define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 108 # define AT91_SPI_CLK 15000000 109 # define DATAFLASH_TCSS (0x1a << 16) 110 # define DATAFLASH_TCHS (0x1 << 24) 111 #endif 112 113 /* NAND flash */ 114 #ifdef CONFIG_CMD_NAND 115 # define CONFIG_NAND_ATMEL 116 # define CONFIG_SYS_MAX_NAND_DEVICE 1 117 # define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 /* 0x40000000 */ 118 # define CONFIG_SYS_NAND_DBW_8 119 # define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 120 # define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 121 # define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) 122 # define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) 123 #endif 124 125 /* Ethernet */ 126 #define CONFIG_MACB 127 #define CONFIG_RMII 128 #define CONFIG_NET_RETRY_COUNT 20 129 #undef CONFIG_RESET_PHY_R 130 131 /* hw-controller addresses */ 132 #define CONFIG_ET1100_BASE 0x70000000 133 134 #ifdef CONFIG_SYS_USE_DATAFLASH 135 136 /* bootstrap + u-boot + env in dataflash on CS0 */ 137 # define CONFIG_ENV_IS_IN_DATAFLASH 138 # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 139 0x8400) 140 # define CONFIG_ENV_OFFSET 0x4200 141 # define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 142 CONFIG_ENV_OFFSET) 143 # define CONFIG_ENV_SIZE 0x4200 144 145 #elif CONFIG_SYS_USE_NANDFLASH 146 147 /* bootstrap + u-boot + env + linux in nandflash */ 148 # define CONFIG_ENV_IS_IN_NAND 1 149 # define CONFIG_ENV_OFFSET 0xC0000 150 # define CONFIG_ENV_SIZE 0x20000 151 152 #endif 153 154 #define CONFIG_SYS_CBSIZE 512 155 #define CONFIG_SYS_MAXARGS 16 156 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 157 sizeof(CONFIG_SYS_PROMPT) + 16) 158 #define CONFIG_SYS_LONGHELP 159 #define CONFIG_CMDLINE_EDITING 160 #define CONFIG_AUTO_COMPLETE 161 162 /* 163 * Size of malloc() pool 164 */ 165 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \ 166 128*1024, 0x1000) 167 168 #endif 169