1 /* 2 * (C) Copyright 2007-2008 3 * Stelian Pop <stelian.pop@leadtechdesign.com> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * 6 * (C) Copyright 2009-2010 7 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu> 8 * esd electronic system design gmbh <www.esd.eu> 9 * 10 * Configuation settings for the esd MEESC board. 11 * 12 * See file CREDITS for list of people who contributed to this 13 * project. 14 * 15 * This program is free software; you can redistribute it and/or 16 * modify it under the terms of the GNU General Public License as 17 * published by the Free Software Foundation; either version 2 of 18 * the License, or (at your option) any later version. 19 * 20 * This program is distributed in the hope that it will be useful, 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * GNU General Public License for more details. 24 * 25 * You should have received a copy of the GNU General Public License 26 * along with this program; if not, write to the Free Software 27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 28 * MA 02111-1307 USA 29 */ 30 31 #ifndef __CONFIG_H 32 #define __CONFIG_H 33 34 /* Common stuff */ 35 #define CONFIG_MEESC 1 /* Board is esd MEESC */ 36 #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ 37 #define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC */ 38 #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */ 39 #define CONFIG_SYS_HZ 1000 /* decrementer freq */ 40 #define CONFIG_DISPLAY_BOARDINFO 1 41 #define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info and speed */ 42 #define CONFIG_PREBOOT /* enable preboot variable */ 43 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 44 #define CONFIG_SETUP_MEMORY_TAGS 1 45 #define CONFIG_INITRD_TAG 1 46 #define CONFIG_SERIAL_TAG 1 47 #define CONFIG_REVISION_TAG 1 48 #undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */ 49 50 #define CONFIG_SKIP_LOWLEVEL_INIT 51 #define CONFIG_SKIP_RELOCATE_UBOOT 52 #define CONFIG_MISC_INIT_R /* Call misc_init_r */ 53 54 #define CONFIG_ARCH_CPU_INIT 55 56 /* 57 * Hardware drivers 58 */ 59 60 /* Console output */ 61 #define CONFIG_AT91_GPIO 1 62 #define CONFIG_ATMEL_USART 1 63 #undef CONFIG_USART0 64 #undef CONFIG_USART1 65 #undef CONFIG_USART2 66 #define CONFIG_USART3 1 /* USART 3 is DBGU */ 67 68 #define CONFIG_BOOTDELAY 3 69 #define CONFIG_ZERO_BOOTDELAY_CHECK 1 70 71 /* 72 * BOOTP options 73 */ 74 #define CONFIG_BOOTP_BOOTFILESIZE 1 75 #define CONFIG_BOOTP_BOOTPATH 1 76 #define CONFIG_BOOTP_GATEWAY 1 77 #define CONFIG_BOOTP_HOSTNAME 1 78 79 /* 80 * Command line configuration. 81 */ 82 #include <config_cmd_default.h> 83 #undef CONFIG_CMD_BDI 84 #undef CONFIG_CMD_FPGA 85 #undef CONFIG_CMD_LOADS 86 #undef CONFIG_CMD_IMLS 87 #undef CONFIG_CMD_USB 88 89 #define CONFIG_CMD_PING 1 90 #define CONFIG_CMD_DHCP 1 91 #define CONFIG_CMD_NAND 1 92 93 /* LED */ 94 #define CONFIG_AT91_LED 1 95 96 /* SDRAM */ 97 #define CONFIG_NR_DRAM_BANKS 1 98 #define PHYS_SDRAM 0x20000000 99 100 /* DataFlash */ 101 #define CONFIG_ATMEL_DATAFLASH_SPI 102 #define CONFIG_HAS_DATAFLASH 1 103 #define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) 104 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 105 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 106 #define AT91_SPI_CLK 15000000 107 #define DATAFLASH_TCSS (0x1a << 16) 108 #define DATAFLASH_TCHS (0x1 << 24) 109 110 /* NOR flash is not populated, disable it */ 111 #define CONFIG_SYS_NO_FLASH 1 112 113 /* NAND flash */ 114 #ifdef CONFIG_CMD_NAND 115 #define CONFIG_NAND_ATMEL 116 #define CONFIG_SYS_MAX_NAND_DEVICE 1 117 #define CONFIG_SYS_NAND_BASE 0x40000000 118 #define CONFIG_SYS_NAND_DBW_8 1 119 /* our ALE is AD21 */ 120 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 121 /* our CLE is AD22 */ 122 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 123 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15 124 #define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22 125 #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ 126 #endif 127 128 /* Ethernet */ 129 #define CONFIG_MACB 1 130 #define CONFIG_RMII 1 131 #define CONFIG_NET_MULTI 1 132 #define CONFIG_NET_RETRY_COUNT 20 133 #undef CONFIG_RESET_PHY_R 134 135 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 136 137 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 138 #define CONFIG_SYS_MEMTEST_END 0x21e00000 139 140 #define CONFIG_SYS_USE_DATAFLASH 1 141 #undef CONFIG_SYS_USE_NANDFLASH 142 143 /* CAN */ 144 #define CONFIG_AT91_CAN 1 145 146 /* hw-controller addresses */ 147 #define CONFIG_ET1100_BASE 0x70000000 148 149 /* bootstrap + u-boot + env in dataflash on CS0 */ 150 #define CONFIG_ENV_IS_IN_DATAFLASH 1 151 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 152 0x8400) 153 #define CONFIG_ENV_OFFSET 0x4200 154 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 155 CONFIG_ENV_OFFSET) 156 #define CONFIG_ENV_SIZE 0x4200 157 158 #define CONFIG_BAUDRATE 115200 159 #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } 160 161 #define CONFIG_SYS_PROMPT "=> " 162 #define CONFIG_SYS_CBSIZE 256 163 #define CONFIG_SYS_MAXARGS 16 164 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 165 sizeof(CONFIG_SYS_PROMPT) + 16) 166 #define CONFIG_SYS_LONGHELP 1 167 #define CONFIG_CMDLINE_EDITING 1 168 169 /* 170 * Size of malloc() pool 171 */ 172 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \ 173 128*1024, 0x1000) 174 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ 175 176 #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ 177 178 #ifdef CONFIG_USE_IRQ 179 #error CONFIG_USE_IRQ not supported 180 #endif 181 182 #endif 183