1 /* 2 * (C) Copyright 2007-2008 3 * Stelian Pop <stelian.pop@leadtechdesign.com> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * 6 * (C) Copyright 2009 7 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu> 8 * esd electronic system design gmbh <www.esd.eu> 9 * 10 * Configuation settings for the esd MEESC board. 11 * 12 * See file CREDITS for list of people who contributed to this 13 * project. 14 * 15 * This program is free software; you can redistribute it and/or 16 * modify it under the terms of the GNU General Public License as 17 * published by the Free Software Foundation; either version 2 of 18 * the License, or (at your option) any later version. 19 * 20 * This program is distributed in the hope that it will be useful, 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * GNU General Public License for more details. 24 * 25 * You should have received a copy of the GNU General Public License 26 * along with this program; if not, write to the Free Software 27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 28 * MA 02111-1307 USA 29 */ 30 31 #ifndef __CONFIG_H 32 #define __CONFIG_H 33 34 #define CONFIG_AT91_LEGACY 35 36 /* Common stuff */ 37 #define CONFIG_SYS_HZ 1000 /* decrementer freq */ 38 #define CONFIG_MEESC 1 /* Board is esd MEESC */ 39 #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ 40 #define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC */ 41 #define CONFIG_DISPLAY_BOARDINFO 1 42 #define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info and speed */ 43 #define CONFIG_PREBOOT /* enable preboot variable */ 44 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 45 #define CONFIG_SETUP_MEMORY_TAGS 1 46 #define CONFIG_INITRD_TAG 1 47 #define CONFIG_SERIAL_TAG 1 48 #define CONFIG_REVISION_TAG 1 49 #undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */ 50 51 #define CONFIG_SKIP_LOWLEVEL_INIT 52 #define CONFIG_SKIP_RELOCATE_UBOOT 53 #define CONFIG_MISC_INIT_R /* Call misc_init_r */ 54 55 #define CONFIG_ARCH_CPU_INIT 56 57 /* 58 * Hardware drivers 59 */ 60 61 /* Console output */ 62 #define CONFIG_AT91_GPIO 1 63 #define CONFIG_ATMEL_USART 1 64 #undef CONFIG_USART0 65 #undef CONFIG_USART1 66 #undef CONFIG_USART2 67 #define CONFIG_USART3 1 /* USART 3 is DBGU */ 68 69 #define CONFIG_BOOTDELAY 3 70 #define CONFIG_ZERO_BOOTDELAY_CHECK 1 71 72 /* 73 * BOOTP options 74 */ 75 #define CONFIG_BOOTP_BOOTFILESIZE 1 76 #define CONFIG_BOOTP_BOOTPATH 1 77 #define CONFIG_BOOTP_GATEWAY 1 78 #define CONFIG_BOOTP_HOSTNAME 1 79 80 /* 81 * Command line configuration. 82 */ 83 #include <config_cmd_default.h> 84 #undef CONFIG_CMD_BDI 85 #undef CONFIG_CMD_FPGA 86 #undef CONFIG_CMD_LOADS 87 #undef CONFIG_CMD_IMLS 88 #undef CONFIG_CMD_USB 89 90 #define CONFIG_CMD_PING 1 91 #define CONFIG_CMD_DHCP 1 92 #define CONFIG_CMD_NAND 1 93 94 /* LED */ 95 #define CONFIG_AT91_LED 1 96 97 /* SDRAM */ 98 #define CONFIG_NR_DRAM_BANKS 1 99 #define PHYS_SDRAM 0x20000000 100 101 /* DataFlash */ 102 #define CONFIG_ATMEL_DATAFLASH_SPI 103 #define CONFIG_HAS_DATAFLASH 1 104 #define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) 105 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 106 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 107 #define AT91_SPI_CLK 15000000 108 #define DATAFLASH_TCSS (0x1a << 16) 109 #define DATAFLASH_TCHS (0x1 << 24) 110 111 /* NOR flash is not populated, disable it */ 112 #define CONFIG_SYS_NO_FLASH 1 113 114 /* NAND flash */ 115 #ifdef CONFIG_CMD_NAND 116 #define CONFIG_NAND_ATMEL 117 #define CONFIG_SYS_MAX_NAND_DEVICE 1 118 #define CONFIG_SYS_NAND_BASE 0x40000000 119 #define CONFIG_SYS_NAND_DBW_8 1 120 /* our ALE is AD21 */ 121 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 122 /* our CLE is AD22 */ 123 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 124 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 125 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22 126 127 #endif 128 129 /* Ethernet */ 130 #define CONFIG_MACB 1 131 #define CONFIG_RMII 1 132 #define CONFIG_NET_MULTI 1 133 #define CONFIG_NET_RETRY_COUNT 20 134 #undef CONFIG_RESET_PHY_R 135 136 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 137 138 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 139 #define CONFIG_SYS_MEMTEST_END 0x21e00000 140 141 #define CONFIG_SYS_USE_DATAFLASH 1 142 #undef CONFIG_SYS_USE_NANDFLASH 143 144 /* CAN */ 145 #define CONFIG_AT91_CAN 1 146 147 /* hw-controller addresses */ 148 #define CONFIG_ET1100_BASE 0x70000000 149 150 /* bootstrap + u-boot + env in dataflash on CS0 */ 151 #define CONFIG_ENV_IS_IN_DATAFLASH 1 152 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 153 0x8400) 154 #define CONFIG_ENV_OFFSET 0x4200 155 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 156 CONFIG_ENV_OFFSET) 157 #define CONFIG_ENV_SIZE 0x4200 158 159 #define CONFIG_BAUDRATE 115200 160 #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } 161 162 #define CONFIG_SYS_PROMPT "=> " 163 #define CONFIG_SYS_CBSIZE 256 164 #define CONFIG_SYS_MAXARGS 16 165 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 166 sizeof(CONFIG_SYS_PROMPT) + 16) 167 #define CONFIG_SYS_LONGHELP 1 168 #define CONFIG_CMDLINE_EDITING 1 169 170 /* 171 * Size of malloc() pool 172 */ 173 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \ 174 128*1024, 0x1000) 175 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ 176 177 #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ 178 179 #ifdef CONFIG_USE_IRQ 180 #error CONFIG_USE_IRQ not supported 181 #endif 182 183 #endif 184