1 /* 2 * (C) Copyright 2007-2008 3 * Stelian Pop <stelian@popies.net> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * 6 * (C) Copyright 2009-2011 7 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu> 8 * esd electronic system design gmbh <www.esd.eu> 9 * 10 * Configuation settings for the esd MEESC board. 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 #ifndef __CONFIG_H 16 #define __CONFIG_H 17 18 /* 19 * SoC must be defined first, before hardware.h is included. 20 * In this case SoC is defined in boards.cfg. 21 */ 22 #include <asm/hardware.h> 23 24 /* 25 * Warning: changing CONFIG_SYS_TEXT_BASE requires 26 * adapting the initial boot program. 27 * Since the linker has to swallow that define, we must use a pure 28 * hex number here! 29 */ 30 #define CONFIG_SYS_TEXT_BASE 0x20002000 31 32 /* 33 * since a number of boards are not being listed in linux 34 * arch/arm/tools/mach-types any more, the mach-types have to be 35 * defined here 36 */ 37 #define MACH_TYPE_MEESC 2165 38 #define MACH_TYPE_ETHERCAN2 2407 39 40 /* ARM asynchronous clock */ 41 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */ 42 #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */ 43 44 /* Misc CPU related */ 45 #define CONFIG_SKIP_LOWLEVEL_INIT 46 #define CONFIG_ARCH_CPU_INIT 47 #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ 48 #define CONFIG_SETUP_MEMORY_TAGS 49 #define CONFIG_INITRD_TAG 50 #define CONFIG_SERIAL_TAG 51 #define CONFIG_REVISION_TAG 52 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 53 #define CONFIG_MISC_INIT_R /* Call misc_init_r */ 54 55 #define CONFIG_DISPLAY_BOARDINFO /* call checkboard() */ 56 #define CONFIG_DISPLAY_CPUINFO /* display cpu info and speed */ 57 #define CONFIG_PREBOOT /* enable preboot variable */ 58 59 /* 60 * Hardware drivers 61 */ 62 63 /* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */ 64 #define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP 65 66 /* general purpose I/O */ 67 #define CONFIG_AT91_GPIO 68 69 /* Console output */ 70 #define CONFIG_ATMEL_USART 71 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 72 #define CONFIG_USART_ID ATMEL_ID_SYS 73 #define CONFIG_BAUDRATE 115200 74 75 #define CONFIG_BOOTDELAY 3 76 #define CONFIG_ZERO_BOOTDELAY_CHECK 77 78 /* 79 * BOOTP options 80 */ 81 #define CONFIG_BOOTP_BOOTFILESIZE 82 #define CONFIG_BOOTP_BOOTPATH 83 #define CONFIG_BOOTP_GATEWAY 84 #define CONFIG_BOOTP_HOSTNAME 85 86 /* 87 * Command line configuration. 88 */ 89 #include <config_cmd_default.h> 90 #undef CONFIG_CMD_BDI 91 #undef CONFIG_CMD_FPGA 92 #undef CONFIG_CMD_LOADS 93 #undef CONFIG_CMD_IMLS 94 95 #define CONFIG_CMD_PING 96 #define CONFIG_CMD_DHCP 97 #define CONFIG_CMD_NAND 98 #define CONFIG_CMD_USB 99 100 /* LED */ 101 #define CONFIG_AT91_LED 102 103 /* 104 * SDRAM: 1 bank, min 32, max 128 MB 105 * Initialized before u-boot gets started. 106 */ 107 #define CONFIG_NR_DRAM_BANKS 1 108 #define CONFIG_SYS_SDRAM_BASE 0x20000000 /* ATMEL_BASE_CS1 */ 109 #define CONFIG_SYS_SDRAM_SIZE 0x02000000 110 111 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000) 112 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000) 113 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000) 114 115 /* 116 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 117 * leaving the correct space for initial global data structure above 118 * that address while providing maximum stack area below. 119 */ 120 #define CONFIG_SYS_INIT_SP_ADDR \ 121 (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE) 122 123 /* DataFlash */ 124 #ifdef CONFIG_SYS_USE_DATAFLASH 125 # define CONFIG_ATMEL_DATAFLASH_SPI 126 # define CONFIG_HAS_DATAFLASH 127 # define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 128 # define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 129 # define AT91_SPI_CLK 15000000 130 # define DATAFLASH_TCSS (0x1a << 16) 131 # define DATAFLASH_TCHS (0x1 << 24) 132 #endif 133 134 /* NOR flash is not populated, disable it */ 135 #define CONFIG_SYS_NO_FLASH 136 137 /* NAND flash */ 138 #ifdef CONFIG_CMD_NAND 139 # define CONFIG_NAND_ATMEL 140 # define CONFIG_SYS_MAX_NAND_DEVICE 1 141 # define CONFIG_SYS_NAND_BASE 0x40000000 /* ATMEL_BASE_CS3 */ 142 # define CONFIG_SYS_NAND_DBW_8 143 # define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 144 # define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 145 # define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) 146 # define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) 147 #endif 148 149 /* Ethernet */ 150 #define CONFIG_MACB 151 #define CONFIG_RMII 152 #define CONFIG_FIT 153 #define CONFIG_NET_RETRY_COUNT 20 154 #undef CONFIG_RESET_PHY_R 155 156 /* USB */ 157 #define CONFIG_USB_ATMEL 158 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 159 #define CONFIG_USB_OHCI_NEW 160 #define CONFIG_DOS_PARTITION 161 #define CONFIG_SYS_USB_OHCI_CPU_INIT 162 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 163 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" 164 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 165 166 /* CAN */ 167 #define CONFIG_AT91_CAN 168 169 /* hw-controller addresses */ 170 #define CONFIG_ET1100_BASE 0x70000000 171 172 #ifdef CONFIG_SYS_USE_DATAFLASH 173 174 /* bootstrap + u-boot + env in dataflash on CS0 */ 175 # define CONFIG_ENV_IS_IN_DATAFLASH 176 # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 177 0x8400) 178 # define CONFIG_ENV_OFFSET 0x4200 179 # define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 180 CONFIG_ENV_OFFSET) 181 # define CONFIG_ENV_SIZE 0x4200 182 183 #elif CONFIG_SYS_USE_NANDFLASH 184 185 /* bootstrap + u-boot + env + linux in nandflash */ 186 # define CONFIG_ENV_IS_IN_NAND 1 187 # define CONFIG_ENV_OFFSET 0xC0000 188 # define CONFIG_ENV_SIZE 0x20000 189 190 #endif 191 192 #define CONFIG_SYS_CBSIZE 512 193 #define CONFIG_SYS_MAXARGS 16 194 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 195 sizeof(CONFIG_SYS_PROMPT) + 16) 196 #define CONFIG_SYS_LONGHELP 197 #define CONFIG_CMDLINE_EDITING 198 199 /* 200 * Size of malloc() pool 201 */ 202 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \ 203 128*1024, 0x1000) 204 205 #endif 206