1 /* 2 * (C) Copyright 2007-2008 3 * Stelian Pop <stelian@popies.net> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * 6 * (C) Copyright 2009-2015 7 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu> 8 * esd electronic system design gmbh <www.esd.eu> 9 * 10 * Configuation settings for the esd MEESC board. 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 #ifndef __CONFIG_H 16 #define __CONFIG_H 17 18 /* 19 * SoC must be defined first, before hardware.h is included. 20 * In this case SoC is defined in boards.cfg. 21 */ 22 #include <asm/hardware.h> 23 24 /* 25 * Warning: changing CONFIG_SYS_TEXT_BASE requires 26 * adapting the initial boot program. 27 * Since the linker has to swallow that define, we must use a pure 28 * hex number here! 29 */ 30 #define CONFIG_SYS_TEXT_BASE 0x21F00000 31 32 /* 33 * since a number of boards are not being listed in linux 34 * arch/arm/tools/mach-types any more, the mach-types have to be 35 * defined here 36 */ 37 #define MACH_TYPE_MEESC 2165 38 #define MACH_TYPE_ETHERCAN2 2407 39 40 /* ARM asynchronous clock */ 41 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */ 42 #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */ 43 44 /* Misc CPU related */ 45 #define CONFIG_SKIP_LOWLEVEL_INIT 46 #define CONFIG_ARCH_CPU_INIT 47 #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ 48 #define CONFIG_SETUP_MEMORY_TAGS 49 #define CONFIG_INITRD_TAG 50 #define CONFIG_SERIAL_TAG 51 #define CONFIG_REVISION_TAG 52 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 53 #define CONFIG_MISC_INIT_R /* Call misc_init_r */ 54 55 #define CONFIG_DISPLAY_BOARDINFO /* call checkboard() */ 56 #define CONFIG_DISPLAY_CPUINFO /* display cpu info and speed */ 57 #define CONFIG_PREBOOT /* enable preboot variable */ 58 59 #define CONFIG_CMD_BOOTZ 60 61 /* 62 * Hardware drivers 63 */ 64 65 /* general purpose I/O */ 66 #define CONFIG_AT91_GPIO 67 68 /* Console output */ 69 #define CONFIG_ATMEL_USART 70 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 71 #define CONFIG_USART_ID ATMEL_ID_SYS 72 #define CONFIG_BAUDRATE 115200 73 74 #define CONFIG_BOOTDELAY 3 75 #define CONFIG_ZERO_BOOTDELAY_CHECK 76 77 /* 78 * BOOTP options 79 */ 80 #define CONFIG_BOOTP_BOOTFILESIZE 81 #define CONFIG_BOOTP_BOOTPATH 82 #define CONFIG_BOOTP_GATEWAY 83 #define CONFIG_BOOTP_HOSTNAME 84 85 /* 86 * Command line configuration. 87 */ 88 #undef CONFIG_CMD_BDI 89 #undef CONFIG_CMD_FPGA 90 #undef CONFIG_CMD_LOADS 91 #undef CONFIG_CMD_IMLS 92 93 #define CONFIG_CMD_PING 94 #define CONFIG_CMD_DHCP 95 96 #ifdef CONFIG_SYS_USE_NANDFLASH 97 #define CONFIG_CMD_NAND 98 #endif 99 100 /* LED */ 101 #define CONFIG_AT91_LED 102 103 /* 104 * SDRAM: 1 bank, min 32, max 128 MB 105 * Initialized before u-boot gets started. 106 */ 107 #define PHYS_SDRAM ATMEL_BASE_CS1 /* 0x20000000 */ 108 #define PHYS_SDRAM_SIZE 0x02000000 /* 32 MByte */ 109 110 #define CONFIG_NR_DRAM_BANKS 1 111 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 112 #define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_SIZE 113 114 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000) 115 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000) 116 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000) 117 118 /* 119 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 120 * leaving the correct space for initial global data structure above 121 * that address while providing maximum stack area below. 122 */ 123 #define CONFIG_SYS_INIT_SP_ADDR \ 124 (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE) 125 126 /* DataFlash */ 127 #ifdef CONFIG_SYS_USE_DATAFLASH 128 # define CONFIG_ATMEL_DATAFLASH_SPI 129 # define CONFIG_HAS_DATAFLASH 130 # define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 131 # define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 132 # define AT91_SPI_CLK 15000000 133 # define DATAFLASH_TCSS (0x1a << 16) 134 # define DATAFLASH_TCHS (0x1 << 24) 135 #endif 136 137 /* NOR flash is not populated, disable it */ 138 #define CONFIG_SYS_NO_FLASH 139 140 /* NAND flash */ 141 #ifdef CONFIG_CMD_NAND 142 # define CONFIG_NAND_ATMEL 143 # define CONFIG_SYS_MAX_NAND_DEVICE 1 144 # define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 /* 0x40000000 */ 145 # define CONFIG_SYS_NAND_DBW_8 146 # define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 147 # define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 148 # define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) 149 # define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) 150 #endif 151 152 /* Ethernet */ 153 #define CONFIG_MACB 154 #define CONFIG_RMII 155 #define CONFIG_NET_RETRY_COUNT 20 156 #undef CONFIG_RESET_PHY_R 157 158 /* hw-controller addresses */ 159 #define CONFIG_ET1100_BASE 0x70000000 160 161 #ifdef CONFIG_SYS_USE_DATAFLASH 162 163 /* bootstrap + u-boot + env in dataflash on CS0 */ 164 # define CONFIG_ENV_IS_IN_DATAFLASH 165 # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 166 0x8400) 167 # define CONFIG_ENV_OFFSET 0x4200 168 # define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 169 CONFIG_ENV_OFFSET) 170 # define CONFIG_ENV_SIZE 0x4200 171 172 #elif CONFIG_SYS_USE_NANDFLASH 173 174 /* bootstrap + u-boot + env + linux in nandflash */ 175 # define CONFIG_ENV_IS_IN_NAND 1 176 # define CONFIG_ENV_OFFSET 0xC0000 177 # define CONFIG_ENV_SIZE 0x20000 178 179 #endif 180 181 #define CONFIG_SYS_CBSIZE 512 182 #define CONFIG_SYS_MAXARGS 16 183 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 184 sizeof(CONFIG_SYS_PROMPT) + 16) 185 #define CONFIG_SYS_LONGHELP 186 #define CONFIG_CMDLINE_EDITING 187 #define CONFIG_AUTO_COMPLETE 188 #define CONFIG_SYS_HUSH_PARSER 189 190 /* 191 * Size of malloc() pool 192 */ 193 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \ 194 128*1024, 0x1000) 195 196 #endif 197