1 /* 2 * (C) Copyright 2007-2008 3 * Stelian Pop <stelian@popies.net> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * 6 * (C) Copyright 2009-2011 7 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu> 8 * esd electronic system design gmbh <www.esd.eu> 9 * 10 * Configuation settings for the esd MEESC board. 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 #ifndef __CONFIG_H 16 #define __CONFIG_H 17 18 /* 19 * SoC must be defined first, before hardware.h is included. 20 * In this case SoC is defined in boards.cfg. 21 */ 22 #include <asm/hardware.h> 23 24 /* 25 * Warning: changing CONFIG_SYS_TEXT_BASE requires 26 * adapting the initial boot program. 27 * Since the linker has to swallow that define, we must use a pure 28 * hex number here! 29 */ 30 #define CONFIG_SYS_TEXT_BASE 0x20002000 31 32 /* 33 * since a number of boards are not being listed in linux 34 * arch/arm/tools/mach-types any more, the mach-types have to be 35 * defined here 36 */ 37 #define MACH_TYPE_MEESC 2165 38 #define MACH_TYPE_ETHERCAN2 2407 39 40 /* ARM asynchronous clock */ 41 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */ 42 #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */ 43 44 /* Misc CPU related */ 45 #define CONFIG_SKIP_LOWLEVEL_INIT 46 #define CONFIG_ARCH_CPU_INIT 47 #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ 48 #define CONFIG_SETUP_MEMORY_TAGS 49 #define CONFIG_INITRD_TAG 50 #define CONFIG_SERIAL_TAG 51 #define CONFIG_REVISION_TAG 52 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 53 #define CONFIG_MISC_INIT_R /* Call misc_init_r */ 54 55 #define CONFIG_DISPLAY_BOARDINFO /* call checkboard() */ 56 #define CONFIG_DISPLAY_CPUINFO /* display cpu info and speed */ 57 #define CONFIG_PREBOOT /* enable preboot variable */ 58 59 #define CONFIG_SYS_GENERIC_BOARD 60 61 /* 62 * Hardware drivers 63 */ 64 65 /* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */ 66 #define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP 67 68 /* general purpose I/O */ 69 #define CONFIG_AT91_GPIO 70 71 /* Console output */ 72 #define CONFIG_ATMEL_USART 73 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 74 #define CONFIG_USART_ID ATMEL_ID_SYS 75 #define CONFIG_BAUDRATE 115200 76 77 #define CONFIG_BOOTDELAY 3 78 #define CONFIG_ZERO_BOOTDELAY_CHECK 79 80 /* 81 * BOOTP options 82 */ 83 #define CONFIG_BOOTP_BOOTFILESIZE 84 #define CONFIG_BOOTP_BOOTPATH 85 #define CONFIG_BOOTP_GATEWAY 86 #define CONFIG_BOOTP_HOSTNAME 87 88 /* 89 * Command line configuration. 90 */ 91 #define CONFIG_CMD_PING 92 #define CONFIG_CMD_DHCP 93 #define CONFIG_CMD_NAND 94 #define CONFIG_CMD_USB 95 96 /* LED */ 97 #define CONFIG_AT91_LED 98 99 /* 100 * SDRAM: 1 bank, min 32, max 128 MB 101 * Initialized before u-boot gets started. 102 */ 103 #define CONFIG_NR_DRAM_BANKS 1 104 #define CONFIG_SYS_SDRAM_BASE 0x20000000 /* ATMEL_BASE_CS1 */ 105 #define CONFIG_SYS_SDRAM_SIZE 0x02000000 106 107 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000) 108 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000) 109 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000) 110 111 /* 112 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 113 * leaving the correct space for initial global data structure above 114 * that address while providing maximum stack area below. 115 */ 116 #define CONFIG_SYS_INIT_SP_ADDR \ 117 (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE) 118 119 /* DataFlash */ 120 #ifdef CONFIG_SYS_USE_DATAFLASH 121 # define CONFIG_ATMEL_DATAFLASH_SPI 122 # define CONFIG_HAS_DATAFLASH 123 # define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 124 # define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 125 # define AT91_SPI_CLK 15000000 126 # define DATAFLASH_TCSS (0x1a << 16) 127 # define DATAFLASH_TCHS (0x1 << 24) 128 #endif 129 130 /* NOR flash is not populated, disable it */ 131 #define CONFIG_SYS_NO_FLASH 132 133 /* NAND flash */ 134 #ifdef CONFIG_CMD_NAND 135 # define CONFIG_NAND_ATMEL 136 # define CONFIG_SYS_MAX_NAND_DEVICE 1 137 # define CONFIG_SYS_NAND_BASE 0x40000000 /* ATMEL_BASE_CS3 */ 138 # define CONFIG_SYS_NAND_DBW_8 139 # define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 140 # define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 141 # define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) 142 # define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) 143 #endif 144 145 /* Ethernet */ 146 #define CONFIG_MACB 147 #define CONFIG_RMII 148 #define CONFIG_FIT 149 #define CONFIG_NET_RETRY_COUNT 20 150 #undef CONFIG_RESET_PHY_R 151 152 /* USB */ 153 #define CONFIG_USB_ATMEL 154 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 155 #define CONFIG_USB_OHCI_NEW 156 #define CONFIG_DOS_PARTITION 157 #define CONFIG_SYS_USB_OHCI_CPU_INIT 158 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 159 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" 160 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 161 162 /* CAN */ 163 #define CONFIG_AT91_CAN 164 165 /* hw-controller addresses */ 166 #define CONFIG_ET1100_BASE 0x70000000 167 168 #ifdef CONFIG_SYS_USE_DATAFLASH 169 170 /* bootstrap + u-boot + env in dataflash on CS0 */ 171 # define CONFIG_ENV_IS_IN_DATAFLASH 172 # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 173 0x8400) 174 # define CONFIG_ENV_OFFSET 0x4200 175 # define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 176 CONFIG_ENV_OFFSET) 177 # define CONFIG_ENV_SIZE 0x4200 178 179 #elif CONFIG_SYS_USE_NANDFLASH 180 181 /* bootstrap + u-boot + env + linux in nandflash */ 182 # define CONFIG_ENV_IS_IN_NAND 1 183 # define CONFIG_ENV_OFFSET 0xC0000 184 # define CONFIG_ENV_SIZE 0x20000 185 186 #endif 187 188 #define CONFIG_SYS_CBSIZE 512 189 #define CONFIG_SYS_MAXARGS 16 190 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 191 sizeof(CONFIG_SYS_PROMPT) + 16) 192 #define CONFIG_SYS_LONGHELP 193 #define CONFIG_CMDLINE_EDITING 194 195 /* 196 * Size of malloc() pool 197 */ 198 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \ 199 128*1024, 0x1000) 200 201 #endif 202