xref: /openbmc/u-boot/include/configs/meesc.h (revision 413ab5b0)
1 /*
2  * (C) Copyright 2007-2008
3  * Stelian Pop <stelian@popies.net>
4  * Lead Tech Design <www.leadtechdesign.com>
5  *
6  * (C) Copyright 2009-2015
7  * Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
8  * esd electronic system design gmbh <www.esd.eu>
9  *
10  * Configuation settings for the esd MEESC board.
11  *
12  * SPDX-License-Identifier:	GPL-2.0+
13  */
14 
15 #ifndef __CONFIG_H
16 #define __CONFIG_H
17 
18 /*
19  * SoC must be defined first, before hardware.h is included.
20  * In this case SoC is defined in boards.cfg.
21  */
22 #include <asm/hardware.h>
23 
24 /*
25  * Warning: changing CONFIG_SYS_TEXT_BASE requires
26  * adapting the initial boot program.
27  * Since the linker has to swallow that define, we must use a pure
28  * hex number here!
29  */
30 #define CONFIG_SYS_TEXT_BASE		0x21F00000
31 
32 /* ARM asynchronous clock */
33 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768	/* 32.768 kHz crystal */
34 #define CONFIG_SYS_AT91_MAIN_CLOCK	16000000/* 16.0 MHz crystal */
35 
36 /* Misc CPU related */
37 #define CONFIG_SKIP_LOWLEVEL_INIT
38 #define CONFIG_ARCH_CPU_INIT
39 #define CONFIG_SETUP_MEMORY_TAGS
40 #define CONFIG_INITRD_TAG
41 #define CONFIG_SERIAL_TAG
42 #define CONFIG_REVISION_TAG
43 #define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
44 #define CONFIG_MISC_INIT_R			/* Call misc_init_r */
45 
46 #define CONFIG_PREBOOT				/* enable preboot variable */
47 
48 /*
49  * Hardware drivers
50  */
51 
52 /*
53  * BOOTP options
54  */
55 #define CONFIG_BOOTP_BOOTFILESIZE
56 #define CONFIG_BOOTP_BOOTPATH
57 #define CONFIG_BOOTP_GATEWAY
58 #define CONFIG_BOOTP_HOSTNAME
59 
60 /*
61  * SDRAM: 1 bank, min 32, max 128 MB
62  * Initialized before u-boot gets started.
63  */
64 #define PHYS_SDRAM					ATMEL_BASE_CS1 /* 0x20000000 */
65 #define PHYS_SDRAM_SIZE				0x02000000     /* 32 MByte */
66 
67 #define CONFIG_NR_DRAM_BANKS		1
68 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
69 #define CONFIG_SYS_SDRAM_SIZE		PHYS_SDRAM_SIZE
70 
71 #define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + 0x00100000)
72 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x01E00000)
73 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x00100000)
74 
75 /*
76  * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
77  * leaving the correct space for initial global data structure above
78  * that address while providing maximum stack area below.
79  */
80 #define CONFIG_SYS_INIT_SP_ADDR \
81 	(ATMEL_BASE_SRAM0 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
82 
83 /* NAND flash */
84 #ifdef CONFIG_CMD_NAND
85 # define CONFIG_NAND_ATMEL
86 # define CONFIG_SYS_MAX_NAND_DEVICE		1
87 # define CONFIG_SYS_NAND_BASE			ATMEL_BASE_CS3 /* 0x40000000 */
88 # define CONFIG_SYS_NAND_DBW_8
89 # define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
90 # define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
91 # define CONFIG_SYS_NAND_ENABLE_PIN		GPIO_PIN_PD(15)
92 # define CONFIG_SYS_NAND_READY_PIN		GPIO_PIN_PA(22)
93 #endif
94 
95 /* Ethernet */
96 #define CONFIG_MACB
97 #define CONFIG_RMII
98 #define CONFIG_NET_RETRY_COUNT			20
99 #undef CONFIG_RESET_PHY_R
100 
101 /* hw-controller addresses */
102 #define CONFIG_ET1100_BASE		0x70000000
103 
104 #ifdef CONFIG_SYS_USE_DATAFLASH
105 
106 /* bootstrap + u-boot + env in dataflash on CS0 */
107 #define CONFIG_ENV_OFFSET	0x4200
108 #define CONFIG_ENV_SIZE		0x4200
109 #define CONFIG_ENV_SECT_SIZE	0x210
110 #define CONFIG_ENV_SPI_MAX_HZ	15000000
111 
112 #elif CONFIG_SYS_USE_NANDFLASH
113 
114 /* bootstrap + u-boot + env + linux in nandflash */
115 # define CONFIG_ENV_OFFSET		0xC0000
116 # define CONFIG_ENV_SIZE		0x20000
117 
118 #endif
119 
120 #define CONFIG_SYS_CBSIZE		512
121 #define CONFIG_SYS_LONGHELP
122 #define CONFIG_CMDLINE_EDITING
123 #define CONFIG_AUTO_COMPLETE
124 
125 /*
126  * Size of malloc() pool
127  */
128 #define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + \
129 					128*1024, 0x1000)
130 
131 #endif
132