1 /* 2 * (C) Copyright 2007-2008 3 * Stelian Pop <stelian.pop@leadtechdesign.com> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * 6 * (C) Copyright 2009 7 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu> 8 * esd electronic system design gmbh <www.esd.eu> 9 * 10 * Configuation settings for the esd MEESC board. 11 * 12 * See file CREDITS for list of people who contributed to this 13 * project. 14 * 15 * This program is free software; you can redistribute it and/or 16 * modify it under the terms of the GNU General Public License as 17 * published by the Free Software Foundation; either version 2 of 18 * the License, or (at your option) any later version. 19 * 20 * This program is distributed in the hope that it will be useful, 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * GNU General Public License for more details. 24 * 25 * You should have received a copy of the GNU General Public License 26 * along with this program; if not, write to the Free Software 27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 28 * MA 02111-1307 USA 29 */ 30 31 #ifndef __CONFIG_H 32 #define __CONFIG_H 33 34 /* Common stuff */ 35 #define CONFIG_SYS_HZ 1000 /* decrementer freq */ 36 #define CONFIG_MEESC 1 /* Board is esd MEESC */ 37 #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ 38 #define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC */ 39 #define CONFIG_ENV_OVERWRITE 1 /* necessary on prototypes */ 40 #define CONFIG_DISPLAY_BOARDINFO 1 41 #define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info and speed */ 42 #define CONFIG_PREBOOT /* enable preboot variable */ 43 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 44 #define CONFIG_SETUP_MEMORY_TAGS 1 45 #define CONFIG_INITRD_TAG 1 46 #undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */ 47 48 #define CONFIG_SKIP_LOWLEVEL_INIT 49 #define CONFIG_SKIP_RELOCATE_UBOOT 50 51 #define CONFIG_ARCH_CPU_INIT 52 53 /* 54 * Hardware drivers 55 */ 56 57 /* Console output */ 58 #define CONFIG_ATMEL_USART 1 59 #undef CONFIG_USART0 60 #undef CONFIG_USART1 61 #undef CONFIG_USART2 62 #define CONFIG_USART3 1 /* USART 3 is DBGU */ 63 64 #define CONFIG_BOOTDELAY 3 65 #define CONFIG_ZERO_BOOTDELAY_CHECK 1 66 67 /* 68 * BOOTP options 69 */ 70 #define CONFIG_BOOTP_BOOTFILESIZE 1 71 #define CONFIG_BOOTP_BOOTPATH 1 72 #define CONFIG_BOOTP_GATEWAY 1 73 #define CONFIG_BOOTP_HOSTNAME 1 74 75 /* 76 * Command line configuration. 77 */ 78 #include <config_cmd_default.h> 79 #undef CONFIG_CMD_BDI 80 #undef CONFIG_CMD_AUTOSCRIPT 81 #undef CONFIG_CMD_FPGA 82 #undef CONFIG_CMD_LOADS 83 #undef CONFIG_CMD_IMLS 84 #undef CONFIG_CMD_USB 85 86 #define CONFIG_CMD_PING 1 87 #define CONFIG_CMD_DHCP 1 88 #define CONFIG_CMD_NAND 1 89 90 /* LED */ 91 #define CONFIG_AT91_LED 1 92 93 /* SDRAM */ 94 #define CONFIG_NR_DRAM_BANKS 1 95 #define PHYS_SDRAM 0x20000000 96 97 /* DataFlash */ 98 #define CONFIG_ATMEL_DATAFLASH_SPI 99 #define CONFIG_HAS_DATAFLASH 1 100 #define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) 101 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 102 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 103 #define AT91_SPI_CLK 15000000 104 #define DATAFLASH_TCSS (0x1a << 16) 105 #define DATAFLASH_TCHS (0x1 << 24) 106 107 /* NOR flash is not populated, disable it */ 108 #define CONFIG_SYS_NO_FLASH 1 109 110 /* NAND flash */ 111 #ifdef CONFIG_CMD_NAND 112 #define CONFIG_NAND_ATMEL 113 #define CONFIG_SYS_MAX_NAND_DEVICE 1 114 #define CONFIG_SYS_NAND_BASE 0x40000000 115 #define CONFIG_SYS_NAND_DBW_8 1 116 /* our ALE is AD21 */ 117 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 118 /* our CLE is AD22 */ 119 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 120 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 121 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22 122 #endif 123 124 /* Ethernet */ 125 #define CONFIG_MACB 1 126 #define CONFIG_RMII 1 127 #define CONFIG_NET_MULTI 1 128 #define CONFIG_NET_RETRY_COUNT 20 129 #undef CONFIG_RESET_PHY_R 130 131 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 132 133 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM 134 #define CONFIG_SYS_MEMTEST_END 0x21e00000 135 136 #define CONFIG_SYS_USE_DATAFLASH 1 137 #undef CONFIG_SYS_USE_NANDFLASH 138 139 #ifdef CONFIG_SYS_USE_DATAFLASH 140 141 /* CAN */ 142 #define CONFIG_AT91_CAN 1 143 144 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 145 #define CONFIG_ENV_IS_IN_DATAFLASH 1 146 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 147 0x8400) 148 #define CONFIG_ENV_OFFSET 0x4200 149 #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 150 CONFIG_ENV_OFFSET) 151 #define CONFIG_ENV_SIZE 0x4200 152 #define CONFIG_BOOTCOMMAND "cp.b C0042000 22000000 210000; bootm" 153 154 #else /* CONFIG_SYS_USE_NANDFLASH */ 155 156 /* bootstrap + u-boot + env + linux in nandflash */ 157 #define CONFIG_ENV_IS_IN_NAND 1 158 #define CONFIG_ENV_OFFSET 0x60000 159 #define CONFIG_ENV_OFFSET_REDUND 0x80000 160 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ 161 #define CONFIG_BOOTCOMMAND "nand read 22000000 A0000 200000; bootm" 162 163 #endif 164 165 #define CONFIG_BAUDRATE 115200 166 #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } 167 168 #define CONFIG_SYS_PROMPT "=> " 169 #define CONFIG_SYS_CBSIZE 256 170 #define CONFIG_SYS_MAXARGS 16 171 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 172 sizeof(CONFIG_SYS_PROMPT) + 16) 173 #define CONFIG_SYS_LONGHELP 1 174 #define CONFIG_CMDLINE_EDITING 1 175 176 /* 177 * Size of malloc() pool 178 */ 179 #define CONFIG_SYS_MALLOC_LEN 0x2D000 180 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ 181 182 #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ 183 184 #ifdef CONFIG_USE_IRQ 185 #error CONFIG_USE_IRQ not supported 186 #endif 187 188 #endif 189