1 /* 2 * (C) Copyright 2007-2008 3 * Stelian Pop <stelian@popies.net> 4 * Lead Tech Design <www.leadtechdesign.com> 5 * 6 * (C) Copyright 2009-2015 7 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu> 8 * esd electronic system design gmbh <www.esd.eu> 9 * 10 * Configuation settings for the esd MEESC board. 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 #ifndef __CONFIG_H 16 #define __CONFIG_H 17 18 /* 19 * SoC must be defined first, before hardware.h is included. 20 * In this case SoC is defined in boards.cfg. 21 */ 22 #include <asm/hardware.h> 23 24 /* 25 * Warning: changing CONFIG_SYS_TEXT_BASE requires 26 * adapting the initial boot program. 27 * Since the linker has to swallow that define, we must use a pure 28 * hex number here! 29 */ 30 #define CONFIG_SYS_TEXT_BASE 0x21F00000 31 32 /* 33 * since a number of boards are not being listed in linux 34 * arch/arm/tools/mach-types any more, the mach-types have to be 35 * defined here 36 */ 37 #define MACH_TYPE_MEESC 2165 38 #define MACH_TYPE_ETHERCAN2 2407 39 40 /* ARM asynchronous clock */ 41 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */ 42 #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */ 43 44 /* Misc CPU related */ 45 #define CONFIG_SKIP_LOWLEVEL_INIT 46 #define CONFIG_ARCH_CPU_INIT 47 #define CONFIG_SETUP_MEMORY_TAGS 48 #define CONFIG_INITRD_TAG 49 #define CONFIG_SERIAL_TAG 50 #define CONFIG_REVISION_TAG 51 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 52 #define CONFIG_MISC_INIT_R /* Call misc_init_r */ 53 54 #define CONFIG_PREBOOT /* enable preboot variable */ 55 56 /* 57 * Hardware drivers 58 */ 59 60 /* general purpose I/O */ 61 #define CONFIG_AT91_GPIO 62 63 /* Console output */ 64 #define CONFIG_ATMEL_USART 65 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 66 #define CONFIG_USART_ID ATMEL_ID_SYS 67 #define CONFIG_BAUDRATE 115200 68 69 /* 70 * BOOTP options 71 */ 72 #define CONFIG_BOOTP_BOOTFILESIZE 73 #define CONFIG_BOOTP_BOOTPATH 74 #define CONFIG_BOOTP_GATEWAY 75 #define CONFIG_BOOTP_HOSTNAME 76 77 /* 78 * Command line configuration. 79 */ 80 81 #ifdef CONFIG_SYS_USE_NANDFLASH 82 #define CONFIG_CMD_NAND 83 #endif 84 85 /* LED */ 86 #define CONFIG_AT91_LED 87 88 /* 89 * SDRAM: 1 bank, min 32, max 128 MB 90 * Initialized before u-boot gets started. 91 */ 92 #define PHYS_SDRAM ATMEL_BASE_CS1 /* 0x20000000 */ 93 #define PHYS_SDRAM_SIZE 0x02000000 /* 32 MByte */ 94 95 #define CONFIG_NR_DRAM_BANKS 1 96 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 97 #define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_SIZE 98 99 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000) 100 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000) 101 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000) 102 103 /* 104 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 105 * leaving the correct space for initial global data structure above 106 * that address while providing maximum stack area below. 107 */ 108 #define CONFIG_SYS_INIT_SP_ADDR \ 109 (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE) 110 111 /* DataFlash */ 112 #ifdef CONFIG_SYS_USE_DATAFLASH 113 # define CONFIG_ATMEL_DATAFLASH_SPI 114 # define CONFIG_HAS_DATAFLASH 115 # define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 116 # define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ 117 # define AT91_SPI_CLK 15000000 118 # define DATAFLASH_TCSS (0x1a << 16) 119 # define DATAFLASH_TCHS (0x1 << 24) 120 #endif 121 122 /* NOR flash is not populated, disable it */ 123 #define CONFIG_SYS_NO_FLASH 124 125 /* NAND flash */ 126 #ifdef CONFIG_CMD_NAND 127 # define CONFIG_NAND_ATMEL 128 # define CONFIG_SYS_MAX_NAND_DEVICE 1 129 # define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 /* 0x40000000 */ 130 # define CONFIG_SYS_NAND_DBW_8 131 # define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 132 # define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 133 # define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) 134 # define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) 135 #endif 136 137 /* Ethernet */ 138 #define CONFIG_MACB 139 #define CONFIG_RMII 140 #define CONFIG_NET_RETRY_COUNT 20 141 #undef CONFIG_RESET_PHY_R 142 143 /* hw-controller addresses */ 144 #define CONFIG_ET1100_BASE 0x70000000 145 146 #ifdef CONFIG_SYS_USE_DATAFLASH 147 148 /* bootstrap + u-boot + env in dataflash on CS0 */ 149 # define CONFIG_ENV_IS_IN_DATAFLASH 150 # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 151 0x8400) 152 # define CONFIG_ENV_OFFSET 0x4200 153 # define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ 154 CONFIG_ENV_OFFSET) 155 # define CONFIG_ENV_SIZE 0x4200 156 157 #elif CONFIG_SYS_USE_NANDFLASH 158 159 /* bootstrap + u-boot + env + linux in nandflash */ 160 # define CONFIG_ENV_IS_IN_NAND 1 161 # define CONFIG_ENV_OFFSET 0xC0000 162 # define CONFIG_ENV_SIZE 0x20000 163 164 #endif 165 166 #define CONFIG_SYS_CBSIZE 512 167 #define CONFIG_SYS_MAXARGS 16 168 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 169 sizeof(CONFIG_SYS_PROMPT) + 16) 170 #define CONFIG_SYS_LONGHELP 171 #define CONFIG_CMDLINE_EDITING 172 #define CONFIG_AUTO_COMPLETE 173 174 /* 175 * Size of malloc() pool 176 */ 177 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \ 178 128*1024, 0x1000) 179 180 #endif 181