1 /* 2 * Copyright (C) 2011 Ilya Yanok, Emcraft Systems 3 * 4 * Based on omap3_evm_config.h 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 /* 13 * High Level Configuration Options 14 */ 15 #define CONFIG_OMAP /* in a TI OMAP core */ 16 #define CONFIG_OMAP3_MCX /* working with mcx */ 17 #define CONFIG_OMAP_GPIO 18 /* Common ARM Erratas */ 19 #define CONFIG_ARM_ERRATA_454179 20 #define CONFIG_ARM_ERRATA_430973 21 #define CONFIG_ARM_ERRATA_621766 22 23 #define MACH_TYPE_MCX 3656 24 #define CONFIG_MACH_TYPE MACH_TYPE_MCX 25 #define CONFIG_BOARD_LATE_INIT 26 27 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ 28 29 #include <asm/arch/cpu.h> /* get chip and board defs */ 30 #include <asm/arch/omap.h> 31 32 /* 33 * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader 34 * and older u-boot.bin with the new U-Boot SPL. 35 */ 36 #define CONFIG_SYS_TEXT_BASE 0x80008000 37 38 /* Clock Defines */ 39 #define V_OSCK 26000000 /* Clock output from T2 */ 40 #define V_SCLK (V_OSCK >> 1) 41 42 #define CONFIG_MISC_INIT_R 43 44 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 45 #define CONFIG_SETUP_MEMORY_TAGS 46 #define CONFIG_INITRD_TAG 47 #define CONFIG_REVISION_TAG 48 49 /* 50 * Size of malloc() pool 51 */ 52 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ 53 #define CONFIG_SYS_MALLOC_LEN (1024 << 10) 54 /* 55 * DDR related 56 */ 57 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) 58 59 /* 60 * Hardware drivers 61 */ 62 63 /* 64 * NS16550 Configuration 65 */ 66 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 67 68 #define CONFIG_SYS_NS16550_SERIAL 69 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 70 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 71 72 /* 73 * select serial console configuration 74 */ 75 #define CONFIG_CONS_INDEX 3 76 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 77 #define CONFIG_SERIAL3 3 /* UART3 */ 78 79 /* allow to overwrite serial and ethaddr */ 80 #define CONFIG_ENV_OVERWRITE 81 #define CONFIG_BAUDRATE 115200 82 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 83 115200} 84 #define CONFIG_MMC 85 #define CONFIG_OMAP_HSMMC 86 #define CONFIG_GENERIC_MMC 87 #define CONFIG_DOS_PARTITION 88 89 /* EHCI */ 90 #define CONFIG_OMAP3_GPIO_2 91 #define CONFIG_OMAP3_GPIO_5 92 #define CONFIG_USB_EHCI 93 #define CONFIG_USB_EHCI_OMAP 94 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57 95 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 96 #define CONFIG_USB_HOST_ETHER 97 #define CONFIG_USB_ETHER_ASIX 98 #define CONFIG_USB_ETHER_MCS7830 99 100 /* commands to include */ 101 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ 102 103 #define CONFIG_CMD_DATE 104 #define CONFIG_CMD_NAND /* NAND support */ 105 #define CONFIG_CMD_UBIFS 106 #define CONFIG_RBTREE 107 #define CONFIG_LZO 108 #define CONFIG_MTD_PARTITIONS 109 #define CONFIG_MTD_DEVICE 110 #define CONFIG_CMD_MTDPARTS 111 112 #define CONFIG_SYS_NO_FLASH 113 #define CONFIG_SYS_I2C 114 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 115 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 116 #define CONFIG_SYS_I2C_OMAP34XX 117 118 /* RTC */ 119 #define CONFIG_RTC_DS1337 120 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 121 122 /* 123 * Board NAND Info. 124 */ 125 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 126 /* to access nand */ 127 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 128 /* to access */ 129 /* nand at CS0 */ 130 131 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ 132 /* NAND devices */ 133 #define CONFIG_JFFS2_NAND 134 /* nand device jffs2 lives on */ 135 #define CONFIG_JFFS2_DEV "nand0" 136 /* start of jffs2 partition */ 137 #define CONFIG_JFFS2_PART_OFFSET 0x680000 138 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */ 139 140 /* Environment information */ 141 142 #define CONFIG_BOOTFILE "uImage" 143 144 /* Setup MTD for NAND on the SOM */ 145 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 146 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \ 147 "1m(u-boot),256k(env1)," \ 148 "256k(env2),6m(kernel),6m(k_recovery)," \ 149 "8m(fs_recovery),-(common_data)" 150 151 #define CONFIG_HOSTNAME mcx 152 #define CONFIG_EXTRA_ENV_SETTINGS \ 153 "adddbg=setenv bootargs ${bootargs} trace_buf_size=64M\0" \ 154 "adddebug=setenv bootargs ${bootargs} earlyprintk=serial\0" \ 155 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ 156 "addfb=setenv bootargs ${bootargs} vram=6M " \ 157 "omapfb.vram=1:2M,2:2M,3:2M omapdss.def_disp=lcd\0" \ 158 "addip_sta=setenv bootargs ${bootargs} " \ 159 "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 160 "${netmask}:${hostname}:eth0:off\0" \ 161 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 162 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 163 "else run addip_sta;fi\0" \ 164 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 165 "addtty=setenv bootargs ${bootargs} " \ 166 "console=${consoledev},${baudrate}\0" \ 167 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 168 "baudrate=115200\0" \ 169 "consoledev=ttyO2\0" \ 170 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 171 "loadaddr=0x82000000\0" \ 172 "load=tftp ${loadaddr} ${u-boot}\0" \ 173 "load_k=tftp ${loadaddr} ${bootfile}\0" \ 174 "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ 175 "loadmlo=tftp ${loadaddr} ${mlo}\0" \ 176 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \ 177 "mmcargs=root=/dev/mmcblk0p2 rw " \ 178 "rootfstype=ext3 rootwait\0" \ 179 "mmcboot=echo Booting from mmc ...; " \ 180 "run mmcargs; " \ 181 "run addip addtty addmtd addfb addeth addmisc;" \ 182 "run loaduimage; " \ 183 "bootm ${loadaddr}\0" \ 184 "net_nfs=run load_k; " \ 185 "run nfsargs; " \ 186 "run addip addtty addmtd addfb addeth addmisc;" \ 187 "bootm ${loadaddr}\0" \ 188 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 189 "nfsroot=${serverip}:${rootpath}\0" \ 190 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \ 191 "uboot_addr=0x80000\0" \ 192 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ 193 "nand write ${loadaddr} ${uboot_addr} 80000\0" \ 194 "updatemlo=nandecc hw;nand erase 0 20000;" \ 195 "nand write ${loadaddr} 0 20000\0" \ 196 "upd=if run load;then echo Updating u-boot;if run update;" \ 197 "then echo U-Boot updated;" \ 198 "else echo Error updating u-boot !;" \ 199 "echo Board without bootloader !!;" \ 200 "fi;" \ 201 "else echo U-Boot not downloaded..exiting;fi\0" \ 202 "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ 203 "bootscript=echo Running bootscript from mmc ...; " \ 204 "source ${loadaddr}\0" \ 205 "nandargs=setenv bootargs ubi.mtd=7 " \ 206 "root=ubi0:rootfs rootfstype=ubifs\0" \ 207 "nandboot=echo Booting from nand ...; " \ 208 "run nandargs; " \ 209 "ubi part nand0,4;" \ 210 "ubi readvol ${loadaddr} kernel;" \ 211 "run addtty addmtd addfb addeth addmisc;" \ 212 "bootm ${loadaddr}\0" \ 213 "preboot=ubi part nand0,7;" \ 214 "ubi readvol ${loadaddr} splash;" \ 215 "bmp display ${loadaddr};" \ 216 "gpio set 55\0" \ 217 "swupdate_args=setenv bootargs root=/dev/ram " \ 218 "quiet loglevel=1 " \ 219 "consoleblank=0 ${swupdate_misc}\0" \ 220 "swupdate=echo Running Sw-Update...;" \ 221 "if printenv mtdparts;then echo Starting SwUpdate...; " \ 222 "else mtdparts default;fi; " \ 223 "ubi part nand0,5;" \ 224 "ubi readvol 0x82000000 kernel_recovery;" \ 225 "ubi part nand0,6;" \ 226 "ubi readvol 0x84000000 fs_recovery;" \ 227 "run swupdate_args; " \ 228 "setenv bootargs ${bootargs} " \ 229 "${mtdparts} " \ 230 "vram=6M omapfb.vram=1:2M,2:2M,3:2M " \ 231 "omapdss.def_disp=lcd;" \ 232 "bootm 0x82000000 0x84000000\0" \ 233 "bootcmd=mmc rescan;if fatload mmc 0 82000000 loadbootscr.scr;" \ 234 "then source 82000000;else run nandboot;fi\0" 235 236 #define CONFIG_AUTO_COMPLETE 237 #define CONFIG_CMDLINE_EDITING 238 239 /* 240 * Miscellaneous configurable options 241 */ 242 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 243 #define CONFIG_SYS_CBSIZE 1024/* Console I/O Buffer Size */ 244 /* Print Buffer Size */ 245 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 246 sizeof(CONFIG_SYS_PROMPT) + 16) 247 #define CONFIG_SYS_MAXARGS 16 /* max number of command */ 248 /* args */ 249 /* Boot Argument Buffer Size */ 250 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 251 /* memtest works on */ 252 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 253 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 254 0x01F00000) /* 31MB */ 255 256 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 257 /* address */ 258 #define CONFIG_PREBOOT 259 260 /* 261 * AM3517 has 12 GP timers, they can be driven by the system clock 262 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 263 * This rate is divided by a local divisor. 264 */ 265 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 266 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 267 268 /* 269 * Physical Memory Map 270 */ 271 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 272 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 273 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 274 275 /* 276 * FLASH and environment organization 277 */ 278 279 /* **** PISMO SUPPORT *** */ 280 #define CONFIG_NAND 281 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 282 #define CONFIG_NAND_OMAP_GPMC 283 #define CONFIG_NAND_OMAP_GPMC_PREFETCH 284 #define CONFIG_ENV_IS_IN_NAND 285 #define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */ 286 287 /* Redundant Environment */ 288 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 289 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 290 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 291 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 292 2 * CONFIG_SYS_ENV_SECT_SIZE) 293 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 294 295 /* Flash banks JFFS2 should use */ 296 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ 297 CONFIG_SYS_MAX_NAND_DEVICE) 298 #define CONFIG_SYS_JFFS2_MEM_NAND 299 /* use flash_info[2] */ 300 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS 301 #define CONFIG_SYS_JFFS2_NUM_BANKS 1 302 303 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 304 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 305 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 306 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 307 CONFIG_SYS_INIT_RAM_SIZE - \ 308 GENERATED_GBL_DATA_SIZE) 309 310 /* Defines for SPL */ 311 #define CONFIG_SPL_FRAMEWORK 312 #define CONFIG_SPL_BOARD_INIT 313 #define CONFIG_SPL_NAND_SIMPLE 314 315 #define CONFIG_SPL_NAND_BASE 316 #define CONFIG_SPL_NAND_DRIVERS 317 #define CONFIG_SPL_NAND_ECC 318 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" 319 320 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 321 #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ 322 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 323 324 /* move malloc and bss high to prevent clashing with the main image */ 325 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 326 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 327 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ 328 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 329 330 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 331 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 332 333 /* NAND boot config */ 334 #define CONFIG_SYS_NAND_PAGE_COUNT 64 335 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 336 #define CONFIG_SYS_NAND_OOBSIZE 64 337 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 338 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 339 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 340 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ 341 48, 49, 50, 51, 52, 53, 54, 55,\ 342 56, 57, 58, 59, 60, 61, 62, 63} 343 #define CONFIG_SYS_NAND_ECCSIZE 256 344 #define CONFIG_SYS_NAND_ECCBYTES 3 345 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW 346 #define CONFIG_SPL_NAND_SOFTECC 347 348 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 349 350 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 351 352 /* 353 * ethernet support 354 * 355 */ 356 #if defined(CONFIG_CMD_NET) 357 #define CONFIG_DRIVER_TI_EMAC 358 #define CONFIG_DRIVER_TI_EMAC_USE_RMII 359 #define CONFIG_MII 360 #define CONFIG_BOOTP_DNS 361 #define CONFIG_BOOTP_DNS2 362 #define CONFIG_BOOTP_SEND_HOSTNAME 363 #define CONFIG_NET_RETRY_COUNT 10 364 #endif 365 366 #define CONFIG_SPLASH_SCREEN 367 #define CONFIG_VIDEO_BMP_RLE8 368 #define CONFIG_CMD_BMP 369 #define CONFIG_VIDEO_OMAP3 370 371 #endif /* __CONFIG_H */ 372